Enable loading stitched tests in partition mode#1
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wenlingz merged 6 commits intoprojectacrn:masterfrom May 14, 2019
Merged
Enable loading stitched tests in partition mode#1wenlingz merged 6 commits intoprojectacrn:masterfrom
wenlingz merged 6 commits intoprojectacrn:masterfrom
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There is no guarantee on the exact values in the selectors of data segments, including DS, ES, FS, GS and SS, at the time an OS is invoked, according to Section 3.2, Multiboot Specification 0.6.96. Not re-initializing the selectors can lead to segmentation faults the first time a reload of segment base address is needed. Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The initialization of .bss is available only when the test is loaded by an ELF loader, which is not the case when it is started directly by a multiboot-compliant bootloader. This patch explicitly clears .bss, except the stack which is already in use when initializing .bss. Signed-off-by: Junjie Mao <junjie.mao@intel.com>
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guest/x86/flat.lds
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| SECTIONS | ||
| { | ||
| . = 4M + SIZEOF_HEADERS; | ||
| . = 4M; |
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Can we make the entry to 4M + SIZEOF_HEADERS + 0xC?
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SIZEOF_HEADERS may change from time to time (e.g. due to the number of sections in the linked executable). This makes the identification of the entry address impossible as we use an objdump'ed raw binary for partition mode.
How about we have two lds, one for single-test executable that should to be loaded as an ELF and the other for the stitched executable that have a fixed entry address and can be loaded as a raw binary?
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Two lds is complicated. Can we have a header added at the beginning of each raw binary which include the binary entry in fixed offset?
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Sorry for the late response.
I have restored the original placement of sections. We can rely on the multiboot header which is always 12-byte and right ahead of the entry point.
Also the .comment and .note sections are discarded as it has been met that ignoring these sections in the linker script leads to a very small bss_start (mostly <1K), which leads the test program to crash when it tries to initialize its .bss section.
Raw binaries can be used as a multiboot module passed to ACRN hypervisor by the physical bootloader. This allows the hypervisor to load a unit test without additional logic for loading ELF files. v1 -> v2: * Do not rely on the code starting at exact 4M. Instead prepending zeros at the beginning of the image to locate the code right at the position decided at link-time. Due to the impreciseness of stext, the starting address of .text section is used as the beginning of the image. Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When stitching multiple tests into a single executable, names of the test files will be used in function identifiers which cannot contain any dash. Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Having each test as a separate binary can easily lead to the explosion of file
numbers, considering the number of cases that will be written for thorough
testing. This also leads to difficulties for running multiple tests in a
partition-mode configuration where guest binaries are always loaded by the
physical bootloader.
This patch introduces a 2-phase link approach to allow the tests to be linked in
either one-per-test or all-in-one. The trick behind the scene is that sources of
each test are first compiled and linked before the following object-level
modifications are conducted.
1. All symbols are converted local, except the function main().
2. The symbol main() is duplicated to main_<test>() which has global
linkage.
3. The symbol main() is converted weak global.
The edited object files are named following the convention
<test>_prelink.o. Each of them can be compiled with the other libraries to
generate an executable ELF, as is done previously, or linked together to
generate one stitched executable that contains all tests indexed by the
generated case_table.c.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Compilers like gcc may place information like compiler versions, build IDs, etc. into dedicate sections called .comment or .note. These sections may be placed even before the entry point if the linker script does not specify how these sections shall be handled. This can be problematic as it is assumed that the beginning of the image is a 12-byte multiboot header, followed by the entry point of the image. It has also been met that ignoring these sections in the linker script leads to a very small bss_start (mostly <1K), which leads the test program to crash when it tries to initialize its .bss section. Discard these sections as these sections contain compiler/linker-specific information which is mostyl useless at runtime. Signed-off-by: Junjie Mao <junjie.mao@intel.com>
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Adds the following tests: - event-counter-config: test event counter configuration - basic-event-count: - programs counters #0 and #1 to count 2 required events (resp. CPU_CYCLES and INST_RETIRED). Counter #0 is preset to a value close enough to the 32b overflow limit so that we check the overflow bit is set after the execution of the asm loop. - mem-access: counts MEM_ACCESS event on counters #0 and #1 with and without 32-bit overflow. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andrew Jones <drjones@redhat.com>
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Clang complains here:
arm/pmu.c:201:16: error: value size does not match register size specified by
the constraint and modifier [-Werror,-Wasm-operand-widths]
: [pmcr] "r" (pmcr)
^
arm/pmu.c:194:18: note: use constraint modifier "w"
" msr pmcr_el0, %[pmcr]\n"
^~~~~~~
%w[pmcr]
arm/pmu.c:200:17: error: value size does not match register size specified by
the constraint and modifier [-Werror,-Wasm-operand-widths]
: [loop] "+r" (loop)
^
arm/pmu.c:196:11: note: use constraint modifier "w"
"1: subs %[loop], %[loop], #1\n"
^~~~~~~
%w[loop]
arm/pmu.c:200:17: error: value size does not match register size specified by
the constraint and modifier [-Werror,-Wasm-operand-widths]
: [loop] "+r" (loop)
^
arm/pmu.c:196:20: note: use constraint modifier "w"
"1: subs %[loop], %[loop], #1\n"
^~~~~~~
%w[loop]
arm/pmu.c:284:35: error: value size does not match register size specified
by the constraint and modifier [-Werror,-Wasm-operand-widths]
: [addr] "r" (addr), [pmcr] "r" (pmcr), [loop] "r" (loop)
^
arm/pmu.c:274:28: note: use constraint modifier "w"
" msr pmcr_el0, %[pmcr]\n"
^~~~~~~
%w[pmcr]
arm/pmu.c:284:54: error: value size does not match register size specified
by the constraint and modifier [-Werror,-Wasm-operand-widths]
: [addr] "r" (addr), [pmcr] "r" (pmcr), [loop] "r" (loop)
^
arm/pmu.c:276:23: note: use constraint modifier "w"
" mov x10, %[loop]\n"
^~~~~~~
%w[loop]
pmcr should be 64-bit since it is a sysreg, but for loop we can use the
"w" modifier.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201001072234.143703-6-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Tested-by: Andrew Jones <drjones@redhat.com>
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/home/travis/build/huth/kvm-unit-tests/lib/arm64/spinlock.c:29:12: error:
value size does not match register size specified by the constraint and
modifier [-Werror,-Wasm-operand-widths]
: "=&r" (val), "=&r" (fail)
^
/home/travis/build/huth/kvm-unit-tests/lib/arm64/spinlock.c:27:9: note: use
constraint modifier "w"
" mov %0, #1\n"
^~
%w0
Use the "w" modifier as suggested to fix the issue.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20201001072234.143703-7-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Tested-by: Andrew Jones <drjones@redhat.com>
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This series enables the execution of acrn unit tests atop a partition-mode-configured ACRN hypervisor. The test cases can be stitched together and selected by the command line passed via multiboot protocol. It is thus possible to control the execution and collect the results of multiple test cases by talking to the HV shell provided that VM creation/destruction commands are provided.
Summary of changes:
Signed-off-by: Junjie Mao junjie.mao@intel.com