Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 3 additions & 9 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -115,7 +115,9 @@ require 'digest/crc32'
module Digest
class CRC3000 < CRC32

WIDTH = 4
WIDTH = 32

REFLECT_INPUT = true

INIT_CRC = 0xffffffff

Expand All @@ -124,14 +126,6 @@ module Digest
TABLE = [
# ....
].freeze

def update(data)
data.each_byte do |b|
@crc = (((@crc >> 8) & 0x00ffffff) ^ @table[(@crc ^ b) & 0xff])
end

return self
end
end
end
```
Expand Down
63 changes: 57 additions & 6 deletions lib/digest/crc.rb
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,9 @@ class CRC < Digest::Class
# The bit width of the CRC checksum
WIDTH = 0

# Define true or false whether the input direction is bit reversed or not of the CRC checksum
REFLECT_INPUT = nil

# Default place holder CRC table
TABLE = [].freeze

Expand Down Expand Up @@ -60,10 +63,11 @@ def self.pack(crc)
# Initializes the CRC checksum.
#
def initialize
@init_crc = self.class.const_get(:INIT_CRC)
@xor_mask = self.class.const_get(:XOR_MASK)
@width = self.class.const_get(:WIDTH)
@table = self.class.const_get(:TABLE)
@init_crc = self.class.const_get(:INIT_CRC)
@xor_mask = self.class.const_get(:XOR_MASK)
@width = self.class.const_get(:WIDTH)
@reflect_input = self.class.const_get(:REFLECT_INPUT)
@table = self.class.const_get(:TABLE)

reset
end
Expand Down Expand Up @@ -93,10 +97,57 @@ def digest_length
# @param [String] data
# The data to update the CRC checksum with.
#
# @abstract
# @raise [NotImplementedError]
# If WIDTH, TABLE, or REFLECT_INPUT constants are not set properly.
#
def update(data)
raise(NotImplementedError,"#{self.class}##{__method__} not implemented")
unless @width >= 1
raise(NotImplementedError, "incompleted #{self.class} as CRC (expected WIDTH to be 1 or more)")
end

if @table.empty?
raise(NotImplementedError, "incompleted #{self.class} as CRC (expected TABLE to be not empty)")
end

if @reflect_input.nil?
raise(NotImplementedError, "incompleted #{self.class} as CRC (expected REFLECT_INPUT to be not nil)")
end

table = @table
crc = @crc

if @reflect_input
if @width > 8
data.each_byte do |b|
crc = table[b ^ (0xff & crc)] ^ (crc >> 8)
end
else
data.each_byte do |b|
# Omit (crc >> 8) since bits upper than the lower 8 bits are always 0
crc = table[b ^ (0xff & crc)]
end
end
else
if @width > 8
higher_bit_off = @width - 8
remain_mask = ~(-1 << higher_bit_off)

data.each_byte do |b|
crc = table[b ^ (0xff & (crc >> higher_bit_off))] ^ ((remain_mask & crc) << 8)
end
else
padding = 8 - @width

data.each_byte do |b|
# Omit (crc << 8) since bits lower than the upper 8 bits are always 0
crc = table[b ^ (0xff & (crc << padding))]
end
end
end

@crc = crc

self
end

#
Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc15.rb
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,8 @@ class CRC15 < CRC

WIDTH = 15

REFLECT_INPUT = false

# Generated by `./pycrc.py --algorithm=table-driven --model=crc-16 --generate=c`
TABLE = [
0x0000, 0x4599, 0x4eab, 0x0b32, 0x58cf, 0x1d56, 0x1664, 0x53fd, 0x7407, 0x319e, 0x3aac, 0x7f35, 0x2cc8, 0x6951, 0x6263, 0x27fa,
Expand All @@ -30,20 +32,6 @@ class CRC15 < CRC
0x276f, 0x62f6, 0x69c4, 0x2c5d, 0x7fa0, 0x3a39, 0x310b, 0x7492, 0x5368, 0x16f1, 0x1dc3, 0x585a, 0x0ba7, 0x4e3e, 0x450c, 0x0095
].freeze

#
# Updates the CRC15 checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = (@table[((@crc >> 7) ^ b) & 0xff] ^ (@crc << 8)) & 0x7fff
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16.rb
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ class CRC16 < CRC

WIDTH = 16

REFLECT_INPUT = true

INIT_CRC = 0x0000

# Generated by `./pycrc.py --algorithm=table-driven --model=crc-16`
Expand Down Expand Up @@ -46,20 +48,6 @@ class CRC16 < CRC
0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
].freeze

#
# Updates the CRC16 checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@table[(@crc ^ b) & 0xff] ^ (@crc >> 8)) & 0xffff)
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_ccitt.rb
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ module Digest
#
class CRC16CCITT < CRC16

REFLECT_INPUT = false

INIT_CRC = 0xffff

# Generated by `./pycrc.py --algorithm=table-driven --model=crc-16-ccitt --generate=c`
Expand Down Expand Up @@ -44,20 +46,6 @@ class CRC16CCITT < CRC16
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
].freeze

#
# Updates the CRC16 CCITT checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@table[((@crc >> 8) ^ b) & 0xff] ^ (@crc << 8)) & 0xffff)
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_dnp.rb
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ module Digest
#
class CRC16DNP < CRC16

REFLECT_INPUT = true

INIT_CRC = 0

TABLE = [
Expand Down Expand Up @@ -43,20 +45,6 @@ class CRC16DNP < CRC16
0x91af, 0xa7f1, 0xfd13, 0xcb4d, 0x48d7, 0x7e89, 0x246b, 0x1235
].freeze

#
# Updates the CRC16 DNP checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@crc >> 8) ^ @table[(@crc ^ b) & 0xff])
end

return self
end

def finish
self.class.pack(~@crc)
end
Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_genibus.rb
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ module Digest
#
class CRC16Genibus < CRC16

REFLECT_INPUT = false

INIT_XOR = 0xffff

INIT_CRC = 0x0000 ^ INIT_XOR
Expand Down Expand Up @@ -50,20 +52,6 @@ class CRC16Genibus < CRC16
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
].freeze

#
# Updates the CRC16 Genibus checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = (@table[((@crc >> 8) ^ b) & 0xff] ^ (@crc << 8)) & 0xffff
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_kermit.rb
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ module Digest
#
class CRC16Kermit < CRC16

REFLECT_INPUT = true

# Generated by `./pycrc.py --algorithm=table-driven --model=kermit --generate=c`
TABLE = [
0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
Expand Down Expand Up @@ -44,20 +46,6 @@ class CRC16Kermit < CRC16
0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
].freeze

#
# Updates the CRC16 Kermit checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = (@table[(@crc ^ b) & 0xff] ^ (@crc >> 8)) & 0xffff
end

return self
end

end
end

Expand Down
4 changes: 3 additions & 1 deletion lib/digest/crc16_x_25.rb
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ module Digest
#
class CRC16X25 < CRC16

REFLECT_INPUT = true

INIT_XOR = 0xffff

INIT_CRC = 0x0 ^ INIT_XOR
Expand Down Expand Up @@ -47,7 +49,7 @@ class CRC16X25 < CRC16
0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
].freeze

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_xmodem.rb
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ module Digest
#
class CRC16XModem < CRC16

REFLECT_INPUT = false

# Generated by `./pycrc.py --algorithm=table-driven --model=xmodem --generate=c`
TABLE = [
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
Expand Down Expand Up @@ -42,20 +44,6 @@ class CRC16XModem < CRC16
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
].freeze

#
# Updates the CRC16 XModem checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@table[((@crc >> 8) ^ b) & 0xff] ^ (@crc << 8)) & 0xffff)
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc16_zmodem.rb
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@ module Digest
#
class CRC16ZModem < CRC16

REFLECT_INPUT = false

# Generated by `./pycrc.py --algorithm=table-driven --model=zmodem --generate=c`
TABLE = [
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
Expand Down Expand Up @@ -42,20 +44,6 @@ class CRC16ZModem < CRC16
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
].freeze

#
# Updates the CRC16 checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@table[((@crc >> 8) ^ b) & 0xff] ^ (@crc << 8)) & 0xffff)
end

return self
end

end
end

Expand Down
16 changes: 2 additions & 14 deletions lib/digest/crc24.rb
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,8 @@ class CRC24 < CRC

WIDTH = 24

REFLECT_INPUT = false

INIT_CRC = 0xb704ce

# Generated by `./pycrc.py --algorithm=table-drive --model=crc24 --generate=c`
Expand Down Expand Up @@ -46,20 +48,6 @@ class CRC24 < CRC
0x42fa2f, 0xc4b6d4, 0xc82f22, 0x4e63d9, 0xd11cce, 0x575035, 0x5bc9c3, 0xdd8538
].freeze

#
# Updates the CRC24 checksum.
#
# @param [String] data
# The data to update the checksum with.
#
def update(data)
data.each_byte do |b|
@crc = ((@table[((@crc >> 16) ^ b) & 0xff] ^ (@crc << 8)) & 0xffffff)
end

return self
end

end
end

Expand Down
Loading