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Fix OSD boundary exceeding the frame boundary
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Using the v4l2 command the OSD feature can be disabled, but actually
it is not disabled in the hardware, instead it is shifted to out
of resolution boundary(frame boundary), so that it won't appear on
the screen. But when the resoution is increased, the OSD is appered
back on the screen though it is disabled.
To fix this a separate register is added so that the OSD will get disabled in the hardware itself.

Libro verion update in the tcl

Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
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shravanI35088 committed May 23, 2023
1 parent c7ef42f commit 2eef88d
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Showing 9 changed files with 92 additions and 104 deletions.
12 changes: 6 additions & 6 deletions MPFS_VIDEO_KIT_REFERENCE_DESIGN.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
#
# // Check Libero version and path lenth to verify project can be created
#
if {[string compare [string range [get_libero_version] 0 end-4] "2022.3"]==0} {
puts "Libero v2022.3 detected."
if {[string compare [string range [get_libero_version] 0 end-4] "2023.1"]==0} {
puts "Libero v2023.1 detected."
} else {
error "Incorrect Libero version. Please use Libero v2022.3 to run these scripts."
error "Incorrect Libero version. Please use Libero v2023.1 to run these scripts."
}

if { [lindex $tcl_platform(os) 0] == "Windows" } {
Expand Down Expand Up @@ -88,14 +88,14 @@ new_project \
# // Download required cores
#

download_core -vlnv {Microsemi:SolutionCore:Bayer_Interpolation:4.4.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SolutionCore:Bayer_Interpolation:4.6.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Actel:DirectCore:CoreAPB3:4.2.100} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Actel:DirectCore:CORERESET_PF:2.3.100} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Actel:DirectCore:CORERXIODBITALIGN:2.2.100} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SolutionCore:Gamma_Correction:4.2.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SolutionCore:Image_Enhancement:4.3.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SolutionCore:Image_Enhancement:4.4.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SolutionCore:IMAGE_SCALER:4.1.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Microsemi:SgCore:PFSOC_INIT_MONITOR:1.0.304} -location {www.microchip-ip.com/repositories/SgCore}
download_core -vlnv {Microsemi:SgCore:PFSOC_INIT_MONITOR:1.0.307} -location {www.microchip-ip.com/repositories/SgCore}
download_core -vlnv {Microchip:SolutionCore:mipicsi2rxdecoderPF:4.7.0} -location {www.microchip-ip.com/repositories/DirectCore}
download_core -vlnv {Actel:SgCore:PF_CCC:2.2.220} -location {www.microchip-ip.com/repositories/SgCore}
download_core -vlnv {Actel:SgCore:PF_CLK_DIV:1.0.103} -location {www.microchip-ip.com/repositories/SgCore}
Expand Down
2 changes: 1 addition & 1 deletion script_support/components/Bayer_Interpolation_C0.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
# Family: PolarFireSoC
# Part Number: MPFS250T_ES-1FCG1152E
# Create and Configure the core component Bayer_Interpolation_C0
create_and_configure_core -core_vlnv {Microsemi:SolutionCore:Bayer_Interpolation:4.4.0} -component_name {Bayer_Interpolation_C0} -params {\
create_and_configure_core -core_vlnv {Microsemi:SolutionCore:Bayer_Interpolation:4.6.0} -component_name {Bayer_Interpolation_C0} -params {\
"G_CONFIG:0" \
"G_DATA_WIDTH:8" \
"G_FORMAT:0" \
Expand Down
21 changes: 11 additions & 10 deletions script_support/components/H264/Video_Pipeline.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -68,16 +68,6 @@ sd_create_bus_port -sd_name ${sd_name} -port_name {wstrb} -port_direction {OUT}


# Create top level Bus interface Ports
sd_create_bif_port -sd_name ${sd_name} -port_name {APBslave} -port_bif_vlnv {AMBA:AMBA2:APB:r0p0} -port_bif_role {slave} -port_bif_mapping {\
"PADDR:paddr_i" \
"PSELx:psel_i" \
"PENABLE:penable_i" \
"PWRITE:pwrite_i" \
"PRDATA:prdata_o" \
"PWDATA:pwdata_i" \
"PREADY:pready_o" \
"PSLVERR:pslverr_o" }

sd_create_bif_port -sd_name ${sd_name} -port_name {BIF_1} -port_bif_vlnv {AMBA:AMBA4:AXI4:r0p0_0} -port_bif_role {mirroredSlave} -port_bif_mapping {\
"AWID:awid" \
"AWADDR:awaddr" \
Expand Down Expand Up @@ -115,6 +105,16 @@ sd_create_bif_port -sd_name ${sd_name} -port_name {BIF_1} -port_bif_vlnv {AMBA:A
"RVALID:rvalid" \
"RREADY:rready" }

sd_create_bif_port -sd_name ${sd_name} -port_name {APBslave} -port_bif_vlnv {AMBA:AMBA2:APB:r0p0} -port_bif_role {slave} -port_bif_mapping {\
"PADDR:paddr_i" \
"PSELx:psel_i" \
"PENABLE:penable_i" \
"PWRITE:pwrite_i" \
"PRDATA:prdata_o" \
"PWDATA:pwdata_i" \
"PREADY:pready_o" \
"PSLVERR:pslverr_o" }

# Add apb3_if_0 instance
sd_instantiate_hdl_core -sd_name ${sd_name} -hdl_core_name {apb3_if} -instance_name {apb3_if_0}
# Exporting Parameters of instance apb3_if_0
Expand Down Expand Up @@ -183,6 +183,7 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"RGBtoYCbCr_C0_0:DATA_VALID_I" "
sd_connect_pins -sd_name ${sd_name} -pin_names {"RGBtoYCbCr_C0_0:DATA_VALID_O" "h264_top_0:data_valid_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:h264_clr_intr_o" "h264_top_0:clr_intr_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:h264_en_o" "video_processing_0:encoder_en_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:osd_en_o" "video_processing_0:OSD_EN_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"frm_interrupt_o" "h264_top_0:frm_interrupt_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"h264_top_0:eof_i" "video_processing_0:eof_encoder_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"h264_top_0:frame_valid_i" "video_processing_0:frame_start_encoder_o" }
Expand Down
2 changes: 1 addition & 1 deletion script_support/components/INIT_MONITOR.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
# Family: PolarFireSoC
# Part Number: MPFS250T_ES-1FCG1152E
# Create and Configure the core component INIT_MONITOR
create_and_configure_core -core_vlnv {Microsemi:SgCore:PFSOC_INIT_MONITOR:1.0.304} -component_name {INIT_MONITOR} -params {\
create_and_configure_core -core_vlnv {Microsemi:SgCore:PFSOC_INIT_MONITOR:1.0.307} -component_name {INIT_MONITOR} -params {\
"BANK_0_CALIB_STATUS_ENABLED:false" \
"BANK_0_CALIB_STATUS_SIMULATION_DELAY:1" \
"BANK_0_RECALIBRATION_ENABLED:false" \
Expand Down
2 changes: 1 addition & 1 deletion script_support/components/Image_Enhancement_C0.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
# Family: PolarFireSoC
# Part Number: MPFS250T_ES-1FCG1152E
# Create and Configure the core component Image_Enhancement_C0
create_and_configure_core -core_vlnv {Microsemi:SolutionCore:Image_Enhancement:4.3.0} -component_name {Image_Enhancement_C0} -params {\
create_and_configure_core -core_vlnv {Microsemi:SolutionCore:Image_Enhancement:4.4.0} -component_name {Image_Enhancement_C0} -params {\
"G_CONFIG:0" \
"G_FORMAT:0" \
"G_PIXEL_WIDTH:8" \
Expand Down
26 changes: 11 additions & 15 deletions script_support/components/video_processing.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@ auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {DATA_VALID_I} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {OSD_EN_I} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RESETN_I} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SYS_CLK_I} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {encoder_en_i} -port_direction {IN}
Expand Down Expand Up @@ -67,12 +68,6 @@ sd_instantiate_component -sd_name ${sd_name} -component_name {Gamma_Correction_C

# Add Image_Enhancement_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {Image_Enhancement_C0} -instance_name {Image_Enhancement_C0_0}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_I} -pin_slices {[15:8]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_I} -pin_slices {[23:16]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_I} -pin_slices {[7:0]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_O} -pin_slices {[15:8]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_O} -pin_slices {[23:16]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {Image_Enhancement_C0_0:DATA_O} -pin_slices {[7:0]}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {Image_Enhancement_C0_0:ENABLE_I} -value {VCC}


Expand Down Expand Up @@ -100,6 +95,7 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:RGB_VA
sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:SYS_CLK_I" "CR_OSD_0:SYS_CLK_I" "Gamma_Correction_C0_0:SYS_CLK_I" "IMAGE_SCALER_C0_0:IP_CLK_I" "IMAGE_SCALER_C0_0:SYS_CLK_I" "Image_Enhancement_C0_0:SYS_CLK_I" "SYS_CLK_I" "frame_controls_gen_0:sys_clk_i" "intensity_average_0:SYS_CLK_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:DATA_ENABLE_I" "DATA_VALID_O" "frame_controls_gen_0:data_valid_r1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:FRAME_END_I" "eof_encoder_o" "frame_controls_gen_0:eof_encoder_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:OSD_EN_I" "OSD_EN_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:DATA_VALID_O" "Image_Enhancement_C0_0:DATA_VALID_I" "intensity_average_0:data_valid_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_VALID_I" "Image_Enhancement_C0_0:DATA_VALID_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_VALID_O" "frame_controls_gen_0:data_valid_i" }
Expand All @@ -113,33 +109,33 @@ sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:B_O" "
sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:DATA_I" "DATA_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:G_O" "Gamma_Correction_C0_0:GREEN_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Bayer_Interpolation_C0_0:R_O" "Gamma_Correction_C0_0:RED_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COMMON_CONST_I" "Image_Enhancement_C0_0:COMMON_CONST_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:b_i" "frame_controls_gen_0:data_b_r1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:b_o" "DATA_B_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:coordinate_i" "coordinate_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:g_i" "frame_controls_gen_0:data_g_r1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:g_o" "DATA_G_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:hres_i" "frame_controls_gen_0:hres_i" "hres_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:num_i" "digits_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:r_i" "frame_controls_gen_0:data_r_r1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:r_o" "DATA_R_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:text_color_rgb_i" "text_color_rgb_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COMMON_CONST_I" "Image_Enhancement_C0_0:COMMON_CONST_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CR_OSD_0:vres_i" "frame_controls_gen_0:vres_i" "vres_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"G_CONST_I" "Image_Enhancement_C0_0:G_CONST_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:BLUE_O" "Image_Enhancement_C0_0:DATA_I[7:0]" "intensity_average_0:b_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:GREEN_O" "Image_Enhancement_C0_0:DATA_I[15:8]" "intensity_average_0:g_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:RED_O" "Image_Enhancement_C0_0:DATA_I[23:16]" "intensity_average_0:r_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_B_I" "Image_Enhancement_C0_0:DATA_O[7:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:BLUE_O" "Image_Enhancement_C0_0:B_I" "intensity_average_0:b_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:GREEN_O" "Image_Enhancement_C0_0:G_I" "intensity_average_0:g_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Gamma_Correction_C0_0:RED_O" "Image_Enhancement_C0_0:R_I" "intensity_average_0:r_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_B_I" "Image_Enhancement_C0_0:B_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_B_O" "frame_controls_gen_0:data_b_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_G_I" "Image_Enhancement_C0_0:DATA_O[15:8]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_G_I" "Image_Enhancement_C0_0:G_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_G_O" "frame_controls_gen_0:data_g_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_R_I" "Image_Enhancement_C0_0:DATA_O[23:16]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_R_I" "Image_Enhancement_C0_0:R_O" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:DATA_R_O" "frame_controls_gen_0:data_r_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:HORZ_RES_OUT_I" "hres_i[12:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:SCALE_FACTOR_HORZ_I" "frame_controls_gen_0:h_scale_factor_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:SCALE_FACTOR_VERT_I" "frame_controls_gen_0:v_scale_factor_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"IMAGE_SCALER_C0_0:VERT_RES_OUT_I" "vres_i[12:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Image_Enhancement_C0_0:R_CONST_I" "R_CONST_I" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"frame_controls_gen_0:hres_i" "hres_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"frame_controls_gen_0:vres_i" "vres_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"intensity_average_0:y_o" "y_o" }


Expand Down
2 changes: 1 addition & 1 deletion script_support/constraint/user.sdc
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ set_clock_groups -name {clk_grp_fic1} -asynchronous -group [ get_clocks { CLOCKS
# APB clock
set_clock_groups -name {clk_grp_fab_apb} -asynchronous -group [ get_clocks { CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT1 } ]
# I2C clock for camera data given to MSS block
set_clock_groups -name {clk_grp_i2c} -asynchronous -group [ get_clocks { CLOCKS_AND_RESETS_inst_0/PF_OSC_C0_0/PF_OSC_C0_0/I_OSC_2/CLK } ]
set_clock_groups -name {clk_grp_i2c} -asynchronous -group [ get_clocks { osc_rc2mhz } ]
#cam clocks
set_clock_groups -name {clk_grp_cam_ccc_o0} -asynchronous -group [ get_clocks { Video_Pipeline_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 } ]
set_clock_groups -name {clk_grp_cam_ccc_ydiv0} -asynchronous -group [ get_clocks {Video_Pipeline_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV } ]
Expand Down
110 changes: 44 additions & 66 deletions script_support/hdl/CR_OSD.v
Original file line number Diff line number Diff line change
Expand Up @@ -41,57 +41,35 @@
////////////////////////////////////////////////////////////////////////////////
//compression ratio on screen display
module CR_OSD(
// Inputs
DATA_ENABLE_I,
FRAME_END_I,
RESETN_I,
SYS_CLK_I,
b_i,
coordinate_i,
g_i,
num_i,
r_i,
text_color_rgb_i,
// Outputs
b_o,
g_o,
r_o
// Input
input DATA_ENABLE_I,
input FRAME_END_I,
input RESETN_I,
input SYS_CLK_I,
input OSD_EN_I,
input [7:0] r_i,
input [7:0] g_i,
input [7:0] b_i,
input [15:0] hres_i,
input [15:0] vres_i,
input [31:0] coordinate_i,
input [11:0] num_i,
input [23:0] text_color_rgb_i,
// Output
output [7:0] b_o,
output [7:0] g_o,
output [7:0] r_o
);

//--------------------------------------------------------------------
// Input
//--------------------------------------------------------------------
input DATA_ENABLE_I;
input FRAME_END_I;
input RESETN_I;
input SYS_CLK_I;
input [7:0] b_i;
input [31:0] coordinate_i;
input [7:0] g_i;
input [11:0] num_i;
input [7:0] r_i;
input [23:0] text_color_rgb_i;
//--------------------------------------------------------------------
// Output
//--------------------------------------------------------------------
output [7:0] b_o;
output [7:0] g_o;
output [7:0] r_o;
localparam G_OSD_LEN = 15'd400;//25 chars * 16 pixels per char
localparam G_VGAP = 15'd20;//16 pixels per char + 4
//--------------------------------------------------------------------
// Nets
//--------------------------------------------------------------------
wire [7:0] b_i;
wire [7:0] b_o_net_0;
wire [19:0] CH_ROM_0_dout;
wire [31:0] coordinate_i;
wire DATA_ENABLE_I;
wire FRAME_END_I;
wire [7:0] g_i;
wire [7:0] g_o_net_0;
wire [15:0] HV_COUNTER_0_H_COUNT_O;
wire HV_COUNTER_0_LINE_END_O;
wire [15:0] HV_COUNTER_0_V_COUNT_O;
wire [11:0] num_i;
wire [7:0] NUM_ROM_0_dout;
wire [9:0] obj_generator_0_mem_addr_o;
wire obj_generator_0_mem_rd_o;
Expand All @@ -100,26 +78,26 @@ wire [9:0] obj_generator_num_0_mem_addr_o;
wire obj_generator_num_0_mem_rd_o;
wire obj_generator_num_0_text_valid_o;
wire OR2_0_Y;
wire [7:0] r_i;
wire [7:0] r_o_net_0;
wire RESETN_I;
wire SYS_CLK_I;
wire [23:16] text_color_rgb_i_slice_0;
wire [15:8] text_color_rgb_i_slice_1;
wire [7:0] text_color_rgb_i_slice_2;
wire [7:0] b_o_net_1;
wire [7:0] r_o_net_1;
wire [7:0] g_o_net_1;
wire [23:0] text_color_rgb_i;
//--------------------------------------------------------------------
// Top level output port assignments
//--------------------------------------------------------------------
assign b_o_net_1 = b_o_net_0;
assign b_o[7:0] = b_o_net_1;
assign r_o_net_1 = r_o_net_0;
assign r_o[7:0] = r_o_net_1;
assign g_o_net_1 = g_o_net_0;
assign g_o[7:0] = g_o_net_1;

reg [31:0] coordinate_r;
always@(posedge SYS_CLK_I, negedge RESETN_I)
if(!RESETN_I)
coordinate_r <= 32'h00040004;
else
begin
if ( coordinate_i[15:0] > vres_i - G_VGAP )
coordinate_r[15:0] <= vres_i - G_VGAP;
else
coordinate_r[15:0] <= coordinate_i[15:0];
if ( coordinate_i[31:16] > hres_i - G_OSD_LEN )
coordinate_r[31:16] <= hres_i - G_OSD_LEN;
else
coordinate_r[31:16] <= coordinate_i[31:16];
end

//--------------------------------------------------------------------
// Slices assignments
//--------------------------------------------------------------------
Expand Down Expand Up @@ -171,7 +149,7 @@ obj_generator obj_generator_0(
.h_counter_i ( HV_COUNTER_0_H_COUNT_O ),
.v_counter_i ( HV_COUNTER_0_V_COUNT_O ),
.ram_data_i ( CH_ROM_0_dout ),
.coordinate_i ( coordinate_i ),
.coordinate_i ( coordinate_r ),
// Outputs
.mem_rd_o ( obj_generator_0_mem_rd_o ),
.text_valid_o ( obj_generator_0_text_valid_o ),
Expand All @@ -188,7 +166,7 @@ obj_generator_num obj_generator_num_0(
.v_counter_i ( HV_COUNTER_0_V_COUNT_O ),
.num_i ( num_i ),
.ram_data_i ( NUM_ROM_0_dout ),
.coordinate_i ( coordinate_i ),
.coordinate_i ( coordinate_r ),
// Outputs
.mem_rd_o ( obj_generator_num_0_mem_rd_o ),
.text_valid_o ( obj_generator_num_0_text_valid_o ),
Expand All @@ -207,17 +185,17 @@ OR2 OR2_0(
//--------text_out
text_out text_out_0(
// Inputs
.txt_vld_i ( OR2_0_Y ),
.txt_vld_i ( OR2_0_Y & OSD_EN_I),
.r_i ( r_i ),
.g_i ( g_i ),
.b_i ( b_i ),
.text_color_r_i ( text_color_rgb_i_slice_0 ),
.text_color_g_i ( text_color_rgb_i_slice_1 ),
.text_color_b_i ( text_color_rgb_i_slice_2 ),
// Outputs
.r_o ( r_o_net_0 ),
.g_o ( g_o_net_0 ),
.b_o ( b_o_net_0 )
.r_o ( r_o ),
.g_o ( g_o ),
.b_o ( b_o )
);


Expand Down Expand Up @@ -679,4 +657,4 @@ assign r_o = txt_vld_i ? text_color_r_i : r_i;
assign g_o = txt_vld_i ? text_color_g_i : g_i;
assign b_o = txt_vld_i ? text_color_b_i : b_i;

endmodule
endmodule
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