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dt-bindings: dmaengine: Add binding for Actions Semi Owl SoCs
Add devicetree binding for Actions Semi Owl SoCs DMA controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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* Actions Semi Owl SoCs DMA controller | ||
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This binding follows the generic DMA bindings defined in dma.txt. | ||
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Required properties: | ||
- compatible: Should be "actions,s900-dma". | ||
- reg: Should contain DMA registers location and length. | ||
- interrupts: Should contain 4 interrupts shared by all channel. | ||
- #dma-cells: Must be <1>. Used to represent the number of integer | ||
cells in the dmas property of client device. | ||
- dma-channels: Physical channels supported. | ||
- dma-requests: Number of DMA request signals supported by the controller. | ||
Refer to Documentation/devicetree/bindings/dma/dma.txt | ||
- clocks: Phandle and Specifier of the clock feeding the DMA controller. | ||
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Example: | ||
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Controller: | ||
dma: dma-controller@e0260000 { | ||
compatible = "actions,s900-dma"; | ||
reg = <0x0 0xe0260000 0x0 0x1000>; | ||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | ||
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; | ||
#dma-cells = <1>; | ||
dma-channels = <12>; | ||
dma-requests = <46>; | ||
clocks = <&clock CLK_DMAC>; | ||
}; | ||
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Client: | ||
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DMA clients connected to the Actions Semi Owl SoCs DMA controller must | ||
use the format described in the dma.txt file, using a two-cell specifier | ||
for each channel. | ||
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The two cells in order are: | ||
1. A phandle pointing to the DMA controller. | ||
2. The channel id. | ||
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uart5: serial@e012a000 { | ||
... | ||
dma-names = "tx", "rx"; | ||
dmas = <&dma 26>, <&dma 27>; | ||
... | ||
}; |