Skip to content

Conversation

@gtker
Copy link
Contributor

@gtker gtker commented Nov 3, 2025

Some misc defines that are useful for writing manual assembly.

@stikonas @oriansj

gtker added 8 commits November 3, 2025 17:54
```
.intel_syntax noprefix
.global _start
_start:
or rcx,rax
mov rax,rcx
cmp rbx,rdx
```
```
main:     file format elf64-x86-64

Disassembly of section .text:

0000000000401000 <_start>:
  401000:	48 09 c1             	or     rcx,rax
  401003:	48 89 c8             	mov    rax,rcx
  401006:	48 39 d3             	cmp    rbx,rdx
```
```
.intel_syntax noprefix
.global _start
_start:
or ecx,eax
mov eax,ecx
cmp ebx,edx
```
```
main:     file format elf64-x86-64

Disassembly of section .text:

0000000000401000 <_start>:
  401000:	09 c1                	or     ecx,eax
  401002:	89 c8                	mov    eax,ecx
  401004:	39 d3                	cmp    ebx,edx
```
```
.global _start
_start:
csel x2,x3,x2,eq
mov x0,x2
mov x3,1
```
```
/tmp/main:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	9a820062 	csel	x2, x3, x2, eq  // eq = none
  40007c:	aa0203e0 	mov	x0, x2
  400080:	d2800023 	mov	x3, #0x1                   	// oriansj#1
```
```

.intel_syntax noprefix
.global _start
_start:
cmp rax,0
cmp rax,1
cmp rcx,0
cmp rcx,1
cmp rcx,rdx

lea rbx, [rbp+257]

movzx rbx,BYTE PTR [rbx]
movzx rcx,BYTE PTR [rax]
movzx rdx,BYTE PTR [rbx]

inc rax
inc rbx

```

```

/tmp/main-amd64:     file format elf64-x86-64

Disassembly of section .text:

0000000000401000 <_start>:
  401000:	48 83 f8 00          	cmp    rax,0x0
  401004:	48 83 f8 01          	cmp    rax,0x1
  401008:	48 83 f9 00          	cmp    rcx,0x0
  40100c:	48 83 f9 01          	cmp    rcx,0x1
  401010:	48 39 d1             	cmp    rcx,rdx
  401013:	48 8d 9d 01 01 00 00 	lea    rbx,[rbp+0x101]
  40101a:	48 0f b6 1b          	movzx  rbx,BYTE PTR [rbx]
  40101e:	48 0f b6 08          	movzx  rcx,BYTE PTR [rax]
  401022:	48 0f b6 13          	movzx  rdx,BYTE PTR [rbx]
  401026:	48 ff c0             	inc    rax
  401029:	48 ff c3             	inc    rbx

```
```

.intel_syntax noprefix
.global _start
_start:
cmp eax,0
cmp eax,1
cmp ecx,0
cmp ecx,1

cmp ecx,edx

lea ebx, [ebp+257]

movzx ebx, BYTE PTR [ebx]
movzx ecx, BYTE PTR [eax]
movzx edx, BYTE PTR [ebx]

inc eax
inc ebx

```

```

/tmp/main-x86:     file format elf32-i386

Disassembly of section .text:

08049000 <_start>:
 8049000:	83 f8 00             	cmp    eax,0x0
 8049003:	83 f8 01             	cmp    eax,0x1
 8049006:	83 f9 00             	cmp    ecx,0x0
 8049009:	83 f9 01             	cmp    ecx,0x1
 804900c:	39 d1                	cmp    ecx,edx
 804900e:	8d 9d 01 01 00 00    	lea    ebx,[ebp+0x101]
 8049014:	0f b6 1b             	movzx  ebx,BYTE PTR [ebx]
 8049017:	0f b6 08             	movzx  ecx,BYTE PTR [eax]
 804901a:	0f b6 13             	movzx  edx,BYTE PTR [ebx]
 804901d:	40                   	inc    eax
 804901e:	43                   	inc    ebx

```
```

.global _start
_start:
ldr x0,[x17,8]
ldr x0,[x17,16]
ldr x0,[x17,24]
ldr x0,[x17,32]
ldr x0,[x17,40]
ldr x0,[x17,48]
ldr x0,[x17,56]
ldr x0,[x17,64]
ldr x0,[x17,72]
ldr x0,[x17,80]
ldr x0,[x17,88]
ldr x0,[x17,96]
ldr x0,[x17,104]
ldr x0,[x17,112]
ldr x0,[x17,120]
ldr x0,[x17,128]

sub x0,x17,8
sub x0,x17,16
sub x0,x17,24
sub x0,x17,32
sub x0,x17,40
sub x0,x17,48
sub x0,x17,56
sub x0,x17,64
sub x0,x17,72
sub x0,x17,80
sub x0,x17,88
sub x0,x17,96
sub x0,x17,104
sub x0,x17,112
sub x0,x17,120
sub x0,x17,128

sub x0,x13,8
sub x0,x13,16
sub x0,x13,24
sub x0,x13,32
sub x0,x13,40
sub x0,x13,48
sub x0,x13,56
sub x0,x13,64
sub x0,x13,72
sub x0,x13,80
sub x0,x13,88
sub x0,x13,96
sub x0,x13,104
sub x0,x13,112
sub x0,x13,120
sub x0,x13,128

```

```

/tmp/main-aarch64:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	f9400620 	ldr	x0, [x17, oriansj#8]
  40007c:	f9400a20 	ldr	x0, [x17, oriansj#16]
  400080:	f9400e20 	ldr	x0, [x17, oriansj#24]
  400084:	f9401220 	ldr	x0, [x17, oriansj#32]
  400088:	f9401620 	ldr	x0, [x17, oriansj#40]
  40008c:	f9401a20 	ldr	x0, [x17, oriansj#48]
  400090:	f9401e20 	ldr	x0, [x17, oriansj#56]
  400094:	f9402220 	ldr	x0, [x17, oriansj#64]
  400098:	f9402620 	ldr	x0, [x17, oriansj#72]
  40009c:	f9402a20 	ldr	x0, [x17, oriansj#80]
  4000a0:	f9402e20 	ldr	x0, [x17, oriansj#88]
  4000a4:	f9403220 	ldr	x0, [x17, oriansj#96]
  4000a8:	f9403620 	ldr	x0, [x17, oriansj#104]
  4000ac:	f9403a20 	ldr	x0, [x17, #112]
  4000b0:	f9403e20 	ldr	x0, [x17, #120]
  4000b4:	f9404220 	ldr	x0, [x17, #128]
  4000b8:	d1002220 	sub	x0, x17, #0x8
  4000bc:	d1004220 	sub	x0, x17, #0x10
  4000c0:	d1006220 	sub	x0, x17, #0x18
  4000c4:	d1008220 	sub	x0, x17, #0x20
  4000c8:	d100a220 	sub	x0, x17, #0x28
  4000cc:	d100c220 	sub	x0, x17, #0x30
  4000d0:	d100e220 	sub	x0, x17, #0x38
  4000d4:	d1010220 	sub	x0, x17, #0x40
  4000d8:	d1012220 	sub	x0, x17, #0x48
  4000dc:	d1014220 	sub	x0, x17, #0x50
  4000e0:	d1016220 	sub	x0, x17, #0x58
  4000e4:	d1018220 	sub	x0, x17, #0x60
  4000e8:	d101a220 	sub	x0, x17, #0x68
  4000ec:	d101c220 	sub	x0, x17, #0x70
  4000f0:	d101e220 	sub	x0, x17, #0x78
  4000f4:	d1020220 	sub	x0, x17, #0x80
  4000f8:	d10021a0 	sub	x0, x13, #0x8
  4000fc:	d10041a0 	sub	x0, x13, #0x10
  400100:	d10061a0 	sub	x0, x13, #0x18
  400104:	d10081a0 	sub	x0, x13, #0x20
  400108:	d100a1a0 	sub	x0, x13, #0x28
  40010c:	d100c1a0 	sub	x0, x13, #0x30
  400110:	d100e1a0 	sub	x0, x13, #0x38
  400114:	d10101a0 	sub	x0, x13, #0x40
  400118:	d10121a0 	sub	x0, x13, #0x48
  40011c:	d10141a0 	sub	x0, x13, #0x50
  400120:	d10161a0 	sub	x0, x13, #0x58
  400124:	d10181a0 	sub	x0, x13, #0x60
  400128:	d101a1a0 	sub	x0, x13, #0x68
  40012c:	d101c1a0 	sub	x0, x13, #0x70
  400130:	d101e1a0 	sub	x0, x13, #0x78
  400134:	d10201a0 	sub	x0, x13, #0x80

```
```

.global _start
_start:
cset w0,cc
cset w0,ls
cset w0,cs
cset w0,hi

```

```

/tmp/main-aarch64:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	1a9f27e0 	cset	w0, cc  // cc = lo, ul, last
  40007c:	1a9f87e0 	cset	w0, ls  // ls = plast
  400080:	1a9f37e0 	cset	w0, cs  // cs = hs, nlast
  400084:	1a9f97e0 	cset	w0, hi  // hi = pmore

```
```

.global _start
_start:
cmp x0,0
cmp x2,0

cmp x2,x3

ldrb w2,[x0]
ldrb w3,[x1]

add x0,x0,1
add x1,x1,1

```

```

/tmp/main-aarch64:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	f100001f 	cmp	x0, #0x0
  40007c:	f100005f 	cmp	x2, #0x0
  400080:	eb03005f 	cmp	x2, x3
  400084:	39400002 	ldrb	w2, [x0]
  400088:	39400023 	ldrb	w3, [x1]
  40008c:	91000400 	add	x0, x0, #0x1
  400090:	91000421 	add	x1, x1, #0x1

```
@gtker
Copy link
Contributor Author

gtker commented Nov 4, 2025

Additional utility defines as well as some codegen improvements for aarch64. I'll add those in a separate M2-Planet PR later.

gtker added 2 commits November 4, 2025 15:47
```

.global _start
_start:
cset w6,lt
cset w6,le
cset w6,eq
cset w6,ne
cset w6,gt
cset w6,ge
cset w6,cc
cset w6,ls
cset w6,cs
cset w6,hi

cbnz w6,20
cbnz w0,20

```

```

/tmp/main-aarch64:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	1a9fa7e6 	cset	w6, lt  // lt = tstop
  40007c:	1a9fc7e6 	cset	w6, le
  400080:	1a9f17e6 	cset	w6, eq  // eq = none
  400084:	1a9f07e6 	cset	w6, ne  // ne = any
  400088:	1a9fd7e6 	cset	w6, gt
  40008c:	1a9fb7e6 	cset	w6, ge  // ge = tcont
  400090:	1a9f27e6 	cset	w6, cc  // cc = lo, ul, last
  400094:	1a9f87e6 	cset	w6, ls  // ls = plast
  400098:	1a9f37e6 	cset	w6, cs  // cs = hs, nlast
  40009c:	1a9f97e6 	cset	w6, hi  // hi = pmore
  4000a0:	350000a6 	cbnz	w6, 4000b4 <_start+0x3c>
  4000a4:	350000a0 	cbnz	w0, 4000b8 <_start+0x40>

```
```

.global _start
_start:
cbz x2,20
cbnz x2,20

```

```

/tmp/main-aarch64:     file format elf64-littleaarch64

Disassembly of section .text:

0000000000400078 <_start>:
  400078:	b40000a2 	cbz	x2, 40008c <_start+0x14>
  40007c:	b50000a2 	cbnz	x2, 400090 <_start+0x18>

```
@stikonas stikonas merged commit bd2f82c into oriansj:main Nov 4, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants