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    • BYU CCL website
      HTML
      57600Updated Nov 13, 2024Nov 13, 2024
    • Bare metal example software projects for PolarFire SoC
      C
      14000Updated Nov 8, 2024Nov 8, 2024
    • Python code to interact with lab instruments (power analyzer/oscilliscope)
      Python
      2010Updated Nov 8, 2024Nov 8, 2024
    • bfasst

      Public
      Tools for FPGA Assurance Flows
      VHDL
      Apache License 2.0
      512122Updated Nov 1, 2024Nov 1, 2024
    • Verilog to Routing -- Open Source CAD Flow for FPGA Research
      C++
      Other
      393100Updated Oct 20, 2024Oct 20, 2024
    • Library to convert a FASM file into BELs importable into Vivado.
      Verilog
      Apache License 2.0
      12000Updated Sep 7, 2024Sep 7, 2024
    • Project X-Ray Database: XC7 Series
      Makefile
      Creative Commons Zero v1.0 Universal
      32000Updated Sep 7, 2024Sep 7, 2024
    • litex

      Public
      Build your hardware, easily!
      C
      Other
      569000Updated Aug 28, 2024Aug 28, 2024
    • prjxray

      Public
      Documenting the Xilinx 7-series bit-stream format.
      Python
      ISC License
      151100Updated Jul 19, 2024Jul 19, 2024
    • Java
      MIT License
      0000Updated May 19, 2024May 19, 2024
    • Digital Design Colab Examples
      Jupyter Notebook
      25310Updated Apr 16, 2024Apr 16, 2024
    • spydrnet

      Public
      A flexible framework for analyzing and transforming FPGA netlists. Official repository.
      Python
      BSD 3-Clause "New" or "Revised" License
      2292431Updated Mar 4, 2024Mar 4, 2024
    • Python
      Apache License 2.0
      16000Updated Feb 12, 2024Feb 12, 2024
    • litedram

      Public
      Small footprint and configurable DRAM core
      Python
      Other
      122000Updated Jan 29, 2024Jan 29, 2024
    • Python
      0100Updated Jan 19, 2024Jan 19, 2024
    • WaFoVe

      Public
      Verilog
      0200Updated Jan 18, 2024Jan 18, 2024
    • TMR utilities for the SpyDrNet project
      Python
      BSD 3-Clause "New" or "Revised" License
      25140Updated Nov 7, 2023Nov 7, 2023
    • iprec

      Public
      Xilinx CoreGen module recognition project. Lead author Corey Simpson.
      Python
      Apache License 2.0
      0222Updated Sep 8, 2023Sep 8, 2023
    • bfat

      Public
      Bitstream Fault Analysis Tool
      Python
      Apache License 2.0
      21381Updated Jul 17, 2023Jul 17, 2023
    • 0000Updated Mar 17, 2023Mar 17, 2023
    • edalize

      Public
      An abstraction library for interfacing EDA tools
      Python
      BSD 2-Clause "Simplified" License
      191100Updated Feb 2, 2023Feb 2, 2023
    • Jupyter Notebook
      Apache License 2.0
      2101Updated Jan 27, 2023Jan 27, 2023
    • 0100Updated Jan 18, 2023Jan 18, 2023
    • vcd_diff

      Public
      0000Updated Oct 11, 2022Oct 11, 2022
    • f4pga-classroom

      Public template
      Python
      3300Updated Oct 10, 2022Oct 10, 2022
    • Magics and JS for Rendering Diagrams in Jupyter Notebooks
      Python
      MIT License
      4000Updated Aug 30, 2022Aug 30, 2022
    • SCSS
      2210Updated Jul 19, 2022Jul 19, 2022
    • bitrec

      Public
      Python/Tcl tools for documenting Xilinx bitstreams. Lead author Corey Simpson.
      Python
      Apache License 2.0
      1290Updated Jun 29, 2022Jun 29, 2022
    • f4pga

      Public
      Documentation for F4PGA
      Python
      Apache License 2.0
      48000Updated May 24, 2022May 24, 2022
    • Repository for folding VTR's Routing Resource Graph
      Python
      1000Updated Mar 24, 2022Mar 24, 2022