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Description
According to https://en.wikipedia.org/wiki/AVX-512#VAES "introduced with Ice Lake" are EVEX-encoded forms of AES-NI and "The wider than 128-bit variations of the instruction perform the same operation on each 128-bit portion of input registers." We could use them where parallelism permits (or bring parallelism down from higher levels by increasing "keys per crypt" accordingly).
We currently do use instructions that look vaes* in (dis)assembly, but those are VEX-encoded 128-bit (supported along with the original AVX, so on older CPUs too), not EVEX and not wider (supported only on recent CPUs on top of AVX-512).