docs: move riscv-isa-manual outside of cv32a65x documentation (#2264)

openhwgroup · Jun 16, 2024 · 802066b · xiaoweish · Jun 18, 2024 · 802066b
1 parent 7e8e2c9
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Showing 54 changed files with 51 additions and 33 deletions.
diff --git a/.gitmodules b/.gitmodules
@@ -47,5 +47,5 @@
 	path = verif/sim/dv
 	url = https://github.com/google/riscv-dv.git
 [submodule "docs/06_cv32a65x_riscv/riscv-isa-manual"]
-	path = docs/04_cv32a65x/riscv/riscv-isa-manual
+	path = docs/riscv-isa/riscv-isa-manual
 	url = https://github.com/riscv/riscv-isa-manual.git
diff --git a/docs/04_cv32a65x/riscv/Makefile b/docs/04_cv32a65x/riscv/Makefile
@@ -4,30 +4,7 @@
 #   SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 #   You may obtain a copy of the License at https://solderpad.org/licenses/
 #
-#   Original Author: Jean-Roch COULON - Thales
+#   Original Author: Thales DIS
 
-all: priv-pdf priv-html unpriv-pdf unpriv-html
-
-setup:
-	mkdir -p build/riscv-isa-manual
-	cp -r riscv-isa-manual/* build/riscv-isa-manual
-	cp -r src build/riscv-isa-manual
-
-priv-pdf: setup
-	cd build/riscv-isa-manual/build; make priv-pdf
-	cp ./build/riscv-isa-manual/build/riscv-privileged.pdf priv-isa-cv32a65x.pdf
-
-priv-html: setup
-	cd build/riscv-isa-manual/build; make priv-html
-	cp ./build/riscv-isa-manual/build/riscv-privileged.html priv-isa-cv32a65x.html
-
-unpriv-pdf: setup
-	cd build/riscv-isa-manual/build; make unpriv-pdf
-	cp ./build/riscv-isa-manual/build/riscv-unprivileged.pdf unpriv-isa-cv32a65x.pdf
-
-unpriv-html: setup
-	cd build/riscv-isa-manual/build; make unpriv-html
-	cp ./build/riscv-isa-manual/build/riscv-unprivileged.html unpriv-isa-cv32a65x.html
-
-clean:
-	rm -rf build
+CONFIG := cv32a65x
+include ../../riscv-isa/build.mk
diff --git a/docs/riscv-isa/build.mk b/docs/riscv-isa/build.mk
@@ -0,0 +1,41 @@
+#   Copyright 2024 Thales DIS France SAS
+#   Licensed under the Solderpad Hardware License, Version 2.1 (the "License");
+#   you may not use this file except in compliance with the License.
+#   SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+#   You may obtain a copy of the License at https://solderpad.org/licenses/
+#
+#   Original Author: Jean-Roch COULON - Thales
+
+ifeq ($(CONFIG),)
+$(error CONFIG must be defined)
+endif
+
+# Path of current file, intended to be included by a configuration subfolder
+riscv-isa_dir := $(dir $(lastword $(MAKEFILE_LIST)))
+
+all: priv-pdf priv-html unpriv-pdf unpriv-html
+
+setup:
+	mkdir -p build/riscv-isa-manual
+	cp -r $(riscv-isa_dir)/riscv-isa-manual/* build/riscv-isa-manual
+	cp -r $(riscv-isa_dir)/src build/riscv-isa-manual
+	cp -r src build/riscv-isa-manual
+
+priv-pdf: setup
+	cd build/riscv-isa-manual/build; make priv-pdf
+	cp ./build/riscv-isa-manual/build/riscv-privileged.pdf priv-isa-$(CONFIG).pdf
+
+priv-html: setup
+	cd build/riscv-isa-manual/build; make priv-html
+	cp ./build/riscv-isa-manual/build/riscv-privileged.html priv-isa-$(CONFIG).html
+
+unpriv-pdf: setup
+	cd build/riscv-isa-manual/build; make unpriv-pdf
+	cp ./build/riscv-isa-manual/build/riscv-unprivileged.pdf unpriv-isa-$(CONFIG).pdf
+
+unpriv-html: setup
+	cd build/riscv-isa-manual/build; make unpriv-html
+	cp ./build/riscv-isa-manual/build/riscv-unprivileged.html unpriv-isa-$(CONFIG).html
+
+clean:
+	rm -rf build
diff --git a/docs/04_cv32a65x/riscv/riscv-isa-manual → docs/riscv-isa/riscv-isa-manual b/docs/04_cv32a65x/riscv/riscv-isa-manual → docs/riscv-isa/riscv-isa-manual
diff --git a/docs/04_cv32a65x/riscv/src/a-st-ext.adoc → docs/riscv-isa/src/a-st-ext.adoc b/docs/04_cv32a65x/riscv/src/a-st-ext.adoc → docs/riscv-isa/src/a-st-ext.adoc
diff --git a/docs/04_cv32a65x/riscv/src/bfloat16.adoc → docs/riscv-isa/src/bfloat16.adoc b/docs/04_cv32a65x/riscv/src/bfloat16.adoc → docs/riscv-isa/src/bfloat16.adoc
diff --git a/...v32a65x/riscv/src/calling-convention.adoc → docs/riscv-isa/src/calling-convention.adoc b/...v32a65x/riscv/src/calling-convention.adoc → docs/riscv-isa/src/calling-convention.adoc
diff --git a/docs/04_cv32a65x/riscv/src/cmo.adoc → docs/riscv-isa/src/cmo.adoc b/docs/04_cv32a65x/riscv/src/cmo.adoc → docs/riscv-isa/src/cmo.adoc
diff --git a/docs/04_cv32a65x/riscv/src/colophon.adoc → docs/riscv-isa/src/colophon.adoc b/docs/04_cv32a65x/riscv/src/colophon.adoc → docs/riscv-isa/src/colophon.adoc
diff --git a/docs/04_cv32a65x/riscv/src/counters.adoc → docs/riscv-isa/src/counters.adoc b/docs/04_cv32a65x/riscv/src/counters.adoc → docs/riscv-isa/src/counters.adoc
diff --git a/docs/04_cv32a65x/riscv/src/d-st-ext.adoc → docs/riscv-isa/src/d-st-ext.adoc b/docs/04_cv32a65x/riscv/src/d-st-ext.adoc → docs/riscv-isa/src/d-st-ext.adoc
diff --git a/docs/04_cv32a65x/riscv/src/f-st-ext.adoc → docs/riscv-isa/src/f-st-ext.adoc b/docs/04_cv32a65x/riscv/src/f-st-ext.adoc → docs/riscv-isa/src/f-st-ext.adoc
diff --git a/docs/04_cv32a65x/riscv/src/hypervisor.adoc → docs/riscv-isa/src/hypervisor.adoc b/docs/04_cv32a65x/riscv/src/hypervisor.adoc → docs/riscv-isa/src/hypervisor.adoc
diff --git a/.../riscv/src/images/bytefield/pmp-rv32.adoc → ...cv-isa/src/images/bytefield/pmp-rv32.adoc b/.../riscv/src/images/bytefield/pmp-rv32.adoc → ...cv-isa/src/images/bytefield/pmp-rv32.adoc
diff --git a/...04_cv32a65x/riscv/src/images/ohg_logo.png → docs/riscv-isa/src/images/ohg_logo.png b/...04_cv32a65x/riscv/src/images/ohg_logo.png → docs/riscv-isa/src/images/ohg_logo.png
diff --git a/docs/04_cv32a65x/riscv/src/indirect-csr.adoc → docs/riscv-isa/src/indirect-csr.adoc b/docs/04_cv32a65x/riscv/src/indirect-csr.adoc → docs/riscv-isa/src/indirect-csr.adoc
diff --git a/docs/04_cv32a65x/riscv/src/machine.adoc → docs/riscv-isa/src/machine.adoc b/docs/04_cv32a65x/riscv/src/machine.adoc → docs/riscv-isa/src/machine.adoc
diff --git a/docs/04_cv32a65x/riscv/src/priv-cfi.adoc → docs/riscv-isa/src/priv-cfi.adoc b/docs/04_cv32a65x/riscv/src/priv-cfi.adoc → docs/riscv-isa/src/priv-cfi.adoc
diff --git a/docs/04_cv32a65x/riscv/src/priv-preface.adoc → docs/riscv-isa/src/priv-preface.adoc b/docs/04_cv32a65x/riscv/src/priv-preface.adoc → docs/riscv-isa/src/priv-preface.adoc
diff --git a/docs/04_cv32a65x/riscv/src/q-st-ext.adoc → docs/riscv-isa/src/q-st-ext.adoc b/docs/04_cv32a65x/riscv/src/q-st-ext.adoc → docs/riscv-isa/src/q-st-ext.adoc
diff --git a/...riscv/src/resources/themes/riscv-spec.yml → ...v-isa/src/resources/themes/riscv-spec.yml b/...riscv/src/resources/themes/riscv-spec.yml → ...v-isa/src/resources/themes/riscv-spec.yml
diff --git a/..._cv32a65x/riscv/src/riscv-privileged.adoc → docs/riscv-isa/src/riscv-privileged.adoc b/..._cv32a65x/riscv/src/riscv-privileged.adoc → docs/riscv-isa/src/riscv-privileged.adoc
@@ -1,5 +1,7 @@
+include::config.adoc[]
+
 [[risc-v-isa]]
-= The RISC-V Instruction Set Manual for CV32A65X: Volume II: Privileged Architecture
+= The RISC-V Instruction Set Manual for {ohg-config}: Volume II: Privileged Architecture
 :description: Volume II - Privileged Architecture
 :company: RISC-V.org
 :revnumber: 20240612
@@ -60,8 +62,6 @@ endif::[]
 :approx: &#8776;
 :inf: &#8734;
 
-include::config.adoc[]
-
 This document describes the RISC-V privileged architecture tailored for
 OpenHW Group {ohg-config}.
 Not relevant parts (e.g. unsupported extensions) of the original

diff --git a/...v32a65x/riscv/src/riscv-unprivileged.adoc → docs/riscv-isa/src/riscv-unprivileged.adoc b/...v32a65x/riscv/src/riscv-unprivileged.adoc → docs/riscv-isa/src/riscv-unprivileged.adoc
@@ -1,5 +1,7 @@
+include::config.adoc[]
+
 [[risc-v-isa]]
-= The RISC-V Instruction Set Manual for CV32A65X: Volume I - Unprivileged Architecture
+= The RISC-V Instruction Set Manual for {ohg-config}: Volume I - Unprivileged Architecture
 :description: Volume I - Unprivileged Architecture
 :company: RISC-V.org
 :revnumber: 20240612
@@ -57,8 +59,6 @@ endif::[]
 :inf: &#8734;
 :csrname: envcfg
 
-include::config.adoc[]
-
 This document describes the RISC-V unprivileged architecture tailored for
 OpenHW Group {ohg-config}.
 Not relevant parts (e.g. unsupported extensions) of the original

diff --git a/docs/04_cv32a65x/riscv/src/rnmi.adoc → docs/riscv-isa/src/rnmi.adoc b/docs/04_cv32a65x/riscv/src/rnmi.adoc → docs/riscv-isa/src/rnmi.adoc
diff --git a/docs/04_cv32a65x/riscv/src/rv-32-64g.adoc → docs/riscv-isa/src/rv-32-64g.adoc b/docs/04_cv32a65x/riscv/src/rv-32-64g.adoc → docs/riscv-isa/src/rv-32-64g.adoc
diff --git a/docs/04_cv32a65x/riscv/src/rv128.adoc → docs/riscv-isa/src/rv128.adoc b/docs/04_cv32a65x/riscv/src/rv128.adoc → docs/riscv-isa/src/rv128.adoc
diff --git a/docs/04_cv32a65x/riscv/src/rv32e.adoc → docs/riscv-isa/src/rv32e.adoc b/docs/04_cv32a65x/riscv/src/rv32e.adoc → docs/riscv-isa/src/rv32e.adoc
diff --git a/docs/04_cv32a65x/riscv/src/rv64.adoc → docs/riscv-isa/src/rv64.adoc b/docs/04_cv32a65x/riscv/src/rv64.adoc → docs/riscv-isa/src/rv64.adoc
diff --git a/.../04_cv32a65x/riscv/src/scalar-crypto.adoc → docs/riscv-isa/src/scalar-crypto.adoc b/.../04_cv32a65x/riscv/src/scalar-crypto.adoc → docs/riscv-isa/src/scalar-crypto.adoc
diff --git a/docs/04_cv32a65x/riscv/src/smcdeleg.adoc → docs/riscv-isa/src/smcdeleg.adoc b/docs/04_cv32a65x/riscv/src/smcdeleg.adoc → docs/riscv-isa/src/smcdeleg.adoc
diff --git a/docs/04_cv32a65x/riscv/src/smcntrpmf.adoc → docs/riscv-isa/src/smcntrpmf.adoc b/docs/04_cv32a65x/riscv/src/smcntrpmf.adoc → docs/riscv-isa/src/smcntrpmf.adoc
diff --git a/docs/04_cv32a65x/riscv/src/smdbltrp.adoc → docs/riscv-isa/src/smdbltrp.adoc b/docs/04_cv32a65x/riscv/src/smdbltrp.adoc → docs/riscv-isa/src/smdbltrp.adoc
diff --git a/docs/04_cv32a65x/riscv/src/smepmp.adoc → docs/riscv-isa/src/smepmp.adoc b/docs/04_cv32a65x/riscv/src/smepmp.adoc → docs/riscv-isa/src/smepmp.adoc
diff --git a/docs/04_cv32a65x/riscv/src/smstateen.adoc → docs/riscv-isa/src/smstateen.adoc b/docs/04_cv32a65x/riscv/src/smstateen.adoc → docs/riscv-isa/src/smstateen.adoc
diff --git a/docs/04_cv32a65x/riscv/src/sscofpmf.adoc → docs/riscv-isa/src/sscofpmf.adoc b/docs/04_cv32a65x/riscv/src/sscofpmf.adoc → docs/riscv-isa/src/sscofpmf.adoc
diff --git a/docs/04_cv32a65x/riscv/src/ssdbltrp.adoc → docs/riscv-isa/src/ssdbltrp.adoc b/docs/04_cv32a65x/riscv/src/ssdbltrp.adoc → docs/riscv-isa/src/ssdbltrp.adoc
diff --git a/docs/04_cv32a65x/riscv/src/sstc.adoc → docs/riscv-isa/src/sstc.adoc b/docs/04_cv32a65x/riscv/src/sstc.adoc → docs/riscv-isa/src/sstc.adoc
diff --git a/docs/04_cv32a65x/riscv/src/supervisor.adoc → docs/riscv-isa/src/supervisor.adoc b/docs/04_cv32a65x/riscv/src/supervisor.adoc → docs/riscv-isa/src/supervisor.adoc
diff --git a/docs/04_cv32a65x/riscv/src/unpriv-cfi.adoc → docs/riscv-isa/src/unpriv-cfi.adoc b/docs/04_cv32a65x/riscv/src/unpriv-cfi.adoc → docs/riscv-isa/src/unpriv-cfi.adoc
diff --git a/docs/04_cv32a65x/riscv/src/v-st-ext.adoc → docs/riscv-isa/src/v-st-ext.adoc b/docs/04_cv32a65x/riscv/src/v-st-ext.adoc → docs/riscv-isa/src/v-st-ext.adoc
diff --git a/.../04_cv32a65x/riscv/src/vector-crypto.adoc → docs/riscv-isa/src/vector-crypto.adoc b/.../04_cv32a65x/riscv/src/vector-crypto.adoc → docs/riscv-isa/src/vector-crypto.adoc
diff --git a/...4_cv32a65x/riscv/src/vector-examples.adoc → docs/riscv-isa/src/vector-examples.adoc b/...4_cv32a65x/riscv/src/vector-examples.adoc → docs/riscv-isa/src/vector-examples.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zabha.adoc → docs/riscv-isa/src/zabha.adoc b/docs/04_cv32a65x/riscv/src/zabha.adoc → docs/riscv-isa/src/zabha.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zacas.adoc → docs/riscv-isa/src/zacas.adoc b/docs/04_cv32a65x/riscv/src/zacas.adoc → docs/riscv-isa/src/zacas.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zawrs.adoc → docs/riscv-isa/src/zawrs.adoc b/docs/04_cv32a65x/riscv/src/zawrs.adoc → docs/riscv-isa/src/zawrs.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zfa.adoc → docs/riscv-isa/src/zfa.adoc b/docs/04_cv32a65x/riscv/src/zfa.adoc → docs/riscv-isa/src/zfa.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zfh.adoc → docs/riscv-isa/src/zfh.adoc b/docs/04_cv32a65x/riscv/src/zfh.adoc → docs/riscv-isa/src/zfh.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zfinx.adoc → docs/riscv-isa/src/zfinx.adoc b/docs/04_cv32a65x/riscv/src/zfinx.adoc → docs/riscv-isa/src/zfinx.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zicond.adoc → docs/riscv-isa/src/zicond.adoc b/docs/04_cv32a65x/riscv/src/zicond.adoc → docs/riscv-isa/src/zicond.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zifencei.adoc → docs/riscv-isa/src/zifencei.adoc b/docs/04_cv32a65x/riscv/src/zifencei.adoc → docs/riscv-isa/src/zifencei.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zihintntl.adoc → docs/riscv-isa/src/zihintntl.adoc b/docs/04_cv32a65x/riscv/src/zihintntl.adoc → docs/riscv-isa/src/zihintntl.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zihintpause.adoc → docs/riscv-isa/src/zihintpause.adoc b/docs/04_cv32a65x/riscv/src/zihintpause.adoc → docs/riscv-isa/src/zihintpause.adoc
diff --git a/docs/04_cv32a65x/riscv/src/zimop.adoc → docs/riscv-isa/src/zimop.adoc b/docs/04_cv32a65x/riscv/src/zimop.adoc → docs/riscv-isa/src/zimop.adoc
diff --git a/docs/04_cv32a65x/riscv/src/ztso-st-ext.adoc → docs/riscv-isa/src/ztso-st-ext.adoc b/docs/04_cv32a65x/riscv/src/ztso-st-ext.adoc → docs/riscv-isa/src/ztso-st-ext.adoc