Closed
Description
In intel/llvm#7468 two enqueue commands were introduced:
piextEnqueueReadHostPipe
piextEnqueueWriteHostPipe
These are only implemented in the OpenCL plugin and make use of the cl_intel_program_scope_host_pipe vendor extension. All other adapters will fail/crash if these entry points are used.
I'm unsure of the utility of these commands beyond OpenCL devices which support pipes, which if I'm not mistaken is generally seen as an FPGA feature.
UR will need to enable this feature, however its unclear to me if this should be in the core spec or defined as an extension devices can opt into supporting in a similar way to the OpenCL vendor extension.