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[GPU] Logging cleanup #2446
[GPU] Logging cleanup #2446
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I have often used this when trying to optimize IR creation time. The main issue is that the trace level introduces overhead (~30% from what I remember) and this overhead was not evenly distributed. This makes is so that performance in trace mode only loosely corresponds to performance in release mode when prioritizing optimizations. Could we add perf information (perhaps in a more compressed format) to the |
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Thanks. Yes, combining it with info might be a good option. Let's keep it as is for now. I plan to open one more PR, will think about this later. |
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make test |
Jira: https://jira.devtools.intel.com/browse/MFDNN-11400.
List of changes:
src/gpu/intel/logging.hpp
with some slight refactoring (constant -> enum class)ir_{warning,perf,trace,...}
togpu
-prefixed versionssrc/gpu/intel/logging.hpp
[TRACE][ codegen.cpp:95] codegen:bind h_34 -> r18 - r19
ir_check
related not-relly-important features asbase_logger_t
, fatal and dynamic log levels, IR check guardir_assert
(and similar macros), renamed usages to the existinggpu_assert
, etcThings left for the future: