Fix rdpmc intrinsics emitter to use correct register size (#78)

backend/amd64/emit.mlp

@@ -896,7 +896,7 @@ let emit_instr fallthrough i =
     I.rdtsc ();
     let rdx = Reg64 RDX in
     (* The instruction fills in the low 32 bits of the result registers. *)
-    (* Combine edx and eax into a single 64-bit result in rdx. *)
+    (* Combine edx and eax into a single 64-bit result. *)
     I.sal (int 32) rdx; (* shift edx to the high part of rdx *)
     (* On processors that support the Intel 64 architecture,
        the high-order 32 bits of each of RAX and RDX are cleared. *)
@@ -912,9 +912,9 @@ let emit_instr fallthrough i =
     I.rdpmc ();
     let rdx = Reg64 RDX in
     (* The instruction fills in the low 32 bits of the result registers. *)
-    (* Combine edx and eax into a single 64-bit result in rdx. *)
+    (* Combine edx and eax into a single 64-bit result. *)
     I.sal (int 32) rdx; (* shift edx to the high part of rdx *)
-    I.mov eax (res i 0); (* zero-extend eax *)
+    I.mov eax (res32 i 0); (* zero-extend eax *)
     I.or_ rdx (res i 0) (* combine high and low into rax *)
   | Lop (Ispecific Icrc32q) ->
     assert (arg i 0 = res i 0);