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manifest: sdk-zephyr: modules: hal_nordic: Add multi-instance DPPI and PPIB drivers #79857 #18073

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17 changes: 9 additions & 8 deletions applications/nrf5340_audio/src/modules/audio_sync_timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -144,6 +144,7 @@ static void rtc_isr_handler(nrfx_rtc_int_type_t int_type)
static int audio_sync_timer_init(void)
{
nrfx_err_t ret;
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

ret = nrfx_timer_init(&audio_sync_hf_timer_instance, &cfg, unused_timer_isr_handler);
if (ret - NRFX_ERROR_BASE_NUM) {
Expand All @@ -161,7 +162,7 @@ static int audio_sync_timer_init(void)
nrfx_rtc_overflow_enable(&audio_sync_lf_timer_instance, true);

/* Initialize capturing of I2S frame start event timestamps */
ret = nrfx_dppi_channel_alloc(&dppi_channel_i2s_frame_start);
ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_i2s_frame_start);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel alloc error (I2S frame start): %d", ret);
return -ENOMEM;
Expand All @@ -177,14 +178,14 @@ static int audio_sync_timer_init(void)
dppi_channel_i2s_frame_start);

nrf_i2s_publish_set(NRF_I2S0, NRF_I2S_EVENT_FRAMESTART, dppi_channel_i2s_frame_start);
ret = nrfx_dppi_channel_enable(dppi_channel_i2s_frame_start);
ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_i2s_frame_start);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel enable error (I2S frame start): %d", ret);
return -EIO;
}

/* Initialize capturing of current timestamps */
ret = nrfx_dppi_channel_alloc(&dppi_channel_curr_time_capture);
ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_curr_time_capture);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel alloc error (I2S frame start) - Return value: %d", ret);
return -ENOMEM;
Expand All @@ -200,14 +201,14 @@ static int audio_sync_timer_init(void)

nrf_egu_publish_set(NRF_EGU0, NRF_EGU_EVENT_TRIGGERED0, dppi_channel_curr_time_capture);

ret = nrfx_dppi_channel_enable(dppi_channel_curr_time_capture);
ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_curr_time_capture);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel enable error (I2S frame start) - Return value: %d", ret);
return -EIO;
}

/* Initialize functionality for synchronization between APP and NET core */
ret = nrfx_dppi_channel_alloc(&dppi_channel_rtc_start);
ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_rtc_start);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel alloc error (timer clear): %d", ret);
return -ENOMEM;
Expand All @@ -222,14 +223,14 @@ static int audio_sync_timer_init(void)
NRF_IPC_CHANNEL_4);
nrf_ipc_publish_set(NRF_IPC, AUDIO_SYNC_TIMER_NET_APP_IPC_EVT, dppi_channel_rtc_start);

ret = nrfx_dppi_channel_enable(dppi_channel_rtc_start);
ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_rtc_start);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel enable error (timer clear): %d", ret);
return -EIO;
}

/* Initialize functionality for synchronization between RTC and TIMER */
ret = nrfx_dppi_channel_alloc(&dppi_channel_timer_sync_with_rtc);
ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_timer_sync_with_rtc);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel alloc error (timer clear): %d", ret);
return -ENOMEM;
Expand All @@ -242,7 +243,7 @@ static int audio_sync_timer_init(void)

nrfx_rtc_tick_enable(&audio_sync_lf_timer_instance, false);

ret = nrfx_dppi_channel_enable(dppi_channel_timer_sync_with_rtc);
ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_timer_sync_with_rtc);
if (ret - NRFX_ERROR_BASE_NUM) {
LOG_ERR("nrfx DPPI channel enable error (timer clear): %d", ret);
return -EIO;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,4 @@

CONFIG_NRFX_TIMER0=y
CONFIG_NRFX_RTC0=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,4 @@

CONFIG_NRFX_TIMER0=y
CONFIG_NRFX_RTC0=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -4,5 +4,5 @@
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
CONFIG_BT_RX_STACK_SIZE=2048
Original file line number Diff line number Diff line change
Expand Up @@ -4,5 +4,5 @@
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
CONFIG_BT_RX_STACK_SIZE=2048
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,6 @@ CONFIG_IPC_SERVICE=y
CONFIG_IPC_SERVICE_BACKEND_RPMSG=y
CONFIG_MBOX=y

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y

CONFIG_HEAP_MEM_POOL_SIZE=4096
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ CONFIG_IPC_SERVICE=y
CONFIG_IPC_SERVICE_BACKEND_RPMSG=y
CONFIG_MBOX=y

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y

CONFIG_HEAP_MEM_POOL_SIZE=4096

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -12,4 +12,4 @@ CONFIG_NRFX_TIMER2=n
# Use necessary peripherals
CONFIG_NRFX_TIMER20=y
CONFIG_NRFX_TIMER10=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -12,4 +12,4 @@ CONFIG_NRFX_TIMER2=n
# Use necessary peripherals
CONFIG_NRFX_TIMER20=y
CONFIG_NRFX_TIMER10=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,4 @@

CONFIG_NRFX_TIMER0=y
CONFIG_NRFX_RTC0=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,4 @@

CONFIG_NRFX_TIMER0=y
CONFIG_NRFX_RTC0=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -4,5 +4,5 @@
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
CONFIG_BT_RX_STACK_SIZE=2048
Original file line number Diff line number Diff line change
Expand Up @@ -4,5 +4,5 @@
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
CONFIG_BT_RX_STACK_SIZE=2048
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,8 @@ CONFIG_PTT_CACHE_MGMT=n

# nrfx drivers configuration:
CONFIG_NRFX_TIMER20=y # enable TIMER2
CONFIG_NRFX_DPPI=y # enable DPPIC
# enable DPPIC
CONFIG_NRFX_GPPI=y

# Set temperature sensor update period in ms
CONFIG_NRF_802154_TEMPERATURE_UPDATE_PERIOD=10000
Original file line number Diff line number Diff line change
Expand Up @@ -9,4 +9,4 @@ CONFIG_NRFX_TIMER0=n

# Enable the necessary drivers
CONFIG_NRFX_TIMER10=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
Original file line number Diff line number Diff line change
Expand Up @@ -9,4 +9,4 @@ CONFIG_NRFX_TIMER0=n

# Enable the necessary drivers
CONFIG_NRFX_TIMER10=y
CONFIG_NRFX_DPPI=y
CONFIG_NRFX_GPPI=y
8 changes: 6 additions & 2 deletions subsys/debug/cpu_load/cpu_load.c
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,8 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
{
nrfx_err_t err;
#ifdef DPPI_PRESENT
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

if (*PUBLISH_ADDR(evt) != 0) {
if (!IS_ENABLED(CONFIG_CPU_LOAD_USE_SHARED_DPPI_CHANNELS)) {
return NRFX_ERROR_BUSY;
Expand All @@ -60,7 +62,7 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
err = NRFX_SUCCESS;
shared_ch_mask |= BIT(*ch);
} else {
err = nrfx_dppi_channel_alloc(ch);
err = nrfx_dppi_channel_alloc(&dppi, ch);
}
#else
err = nrfx_ppi_channel_alloc((nrf_ppi_channel_t *)ch);
Expand All @@ -71,9 +73,11 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
static nrfx_err_t ppi_free(uint8_t ch)
{
#ifdef DPPI_PRESENT
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

if (!IS_ENABLED(CONFIG_CPU_LOAD_USE_SHARED_DPPI_CHANNELS)
|| ((BIT(ch) & shared_ch_mask) == 0)) {
return nrfx_dppi_channel_free(ch);
return nrfx_dppi_channel_free(&dppi, ch);
} else {
return NRFX_SUCCESS;
}
Expand Down
4 changes: 3 additions & 1 deletion subsys/debug/ppi_trace/ppi_trace.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,8 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
{
nrfx_err_t err;
#ifdef DPPI_PRESENT
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

if (*PUBLISH_ADDR(evt) != 0) {
/* Use mask of one of subscribe registers in the system,
* assuming that all subscribe registers has the same mask for
Expand All @@ -73,7 +75,7 @@ static nrfx_err_t ppi_alloc(uint8_t *ch, uint32_t evt)
*ch = *PUBLISH_ADDR(evt) & DPPIC_SUBSCRIBE_CHG_EN_CHIDX_Msk;
err = NRFX_SUCCESS;
} else {
err = nrfx_dppi_channel_alloc(ch);
err = nrfx_dppi_channel_alloc(&dppi, ch);
}
#else
err = nrfx_ppi_channel_alloc((nrf_ppi_channel_t *)ch);
Expand Down
5 changes: 4 additions & 1 deletion subsys/dm/dm.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,11 @@

#if defined(DPPI_PRESENT)
#include <nrfx_dppi.h>

static nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

#define gppi_channel_t uint8_t
#define gppi_channel_alloc nrfx_dppi_channel_alloc
#define gppi_channel_alloc(x) nrfx_dppi_channel_alloc(&dppi, x)
#else
#include <nrfx_ppi.h>
#define gppi_channel_t nrf_ppi_channel_t
Expand Down
36 changes: 20 additions & 16 deletions subsys/esb/esb_dppi.c
Original file line number Diff line number Diff line change
Expand Up @@ -225,44 +225,46 @@ int esb_ppi_init(void)

#else

err = nrfx_dppi_channel_alloc(&radio_address_timer_stop);
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

err = nrfx_dppi_channel_alloc(&dppi, &radio_address_timer_stop);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_alloc(&timer_compare0_radio_disable);
err = nrfx_dppi_channel_alloc(&dppi, &timer_compare0_radio_disable);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_alloc(&timer_compare1_radio_txen);
err = nrfx_dppi_channel_alloc(&dppi, &timer_compare1_radio_txen);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_alloc(&disabled_phy_end_egu);
err = nrfx_dppi_channel_alloc(&dppi, &disabled_phy_end_egu);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_alloc(&egu_timer_start);
err = nrfx_dppi_channel_alloc(&dppi, &egu_timer_start);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_alloc(&egu_ramp_up);
err = nrfx_dppi_channel_alloc(&dppi, &egu_ramp_up);
if (err != NRFX_SUCCESS) {
goto error;
}

if (IS_ENABLED(CONFIG_ESB_NEVER_DISABLE_TX)) {
err = nrfx_dppi_channel_alloc(&radio_end_timer_start);
err = nrfx_dppi_channel_alloc(&dppi, &radio_end_timer_start);
if (err != NRFX_SUCCESS) {
goto error;
}
}

err = nrfx_dppi_group_alloc(&ramp_up_dppi_group);
err = nrfx_dppi_group_alloc(&dppi, &ramp_up_dppi_group);
if (err != NRFX_SUCCESS) {
LOG_ERR("gppi_group_alloc failed with: %d\n", err);
return -ENODEV;
Expand Down Expand Up @@ -315,44 +317,46 @@ void esb_ppi_deinit(void)

#else

err = nrfx_dppi_channel_free(radio_address_timer_stop);
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

err = nrfx_dppi_channel_free(&dppi, radio_address_timer_stop);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_free(timer_compare0_radio_disable);
err = nrfx_dppi_channel_free(&dppi, timer_compare0_radio_disable);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_free(timer_compare1_radio_txen);
err = nrfx_dppi_channel_free(&dppi, timer_compare1_radio_txen);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_free(disabled_phy_end_egu);
err = nrfx_dppi_channel_free(&dppi, disabled_phy_end_egu);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_free(egu_timer_start);
err = nrfx_dppi_channel_free(&dppi, egu_timer_start);
if (err != NRFX_SUCCESS) {
goto error;
}

err = nrfx_dppi_channel_free(egu_ramp_up);
err = nrfx_dppi_channel_free(&dppi, egu_ramp_up);
if (err != NRFX_SUCCESS) {
goto error;
}

if (IS_ENABLED(CONFIG_ESB_NEVER_DISABLE_TX)) {
err = nrfx_dppi_channel_free(radio_end_timer_start);
err = nrfx_dppi_channel_free(&dppi, radio_end_timer_start);
if (err != NRFX_SUCCESS) {
goto error;
}
}

err = nrfx_dppi_group_free(ramp_up_dppi_group);
err = nrfx_dppi_group_free(&dppi, ramp_up_dppi_group);
if (err != NRFX_SUCCESS) {
goto error;
}
Expand Down
5 changes: 4 additions & 1 deletion subsys/mpsl/fem/common/mpsl_fem_utils.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,12 +19,15 @@
int mpsl_fem_utils_ppi_channel_alloc(uint8_t *ppi_channels, size_t size)
{
nrfx_err_t err = NRFX_ERROR_NOT_SUPPORTED;
#ifdef DPPI_PRESENT
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);
#endif

for (int i = 0; i < size; i++) {
IF_ENABLED(CONFIG_HAS_HW_NRF_PPI,
(err = nrfx_ppi_channel_alloc(&ppi_channels[i]);));
IF_ENABLED(CONFIG_HAS_HW_NRF_DPPIC,
(err = nrfx_dppi_channel_alloc(&ppi_channels[i]);));
(err = nrfx_dppi_channel_alloc(&dppi, &ppi_channels[i]);));
if (err != NRFX_SUCCESS) {
return -ENOMEM;
}
Expand Down
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