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i64x2.eq instruction (WebAssembly#381)
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proposals/simd/BinarySIMD.md

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@@ -249,3 +249,4 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `v128.store16_lane` | `TBD`| m:memarg, i:ImmLaneIdx8 |
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| `v128.store32_lane` | `TBD`| m:memarg, i:ImmLaneIdx4 |
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| `v128.store64_lane` | `TBD`| m:memarg, i:ImmLaneIdx2 |
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| `i64x2.eq` | `TBD`| - |

proposals/simd/ImplementationStatus.md

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@@ -148,6 +148,7 @@
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| `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i32x4.dot_i16x8_s` | | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i64x2.eq` | | | | | |
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| `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |
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| `i64x2.bitmask` | | :heavy_check_mark: | | | |
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| `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: |

proposals/simd/SIMD.md

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@@ -717,6 +717,7 @@ in each lane are `0` for `false` and all ones for `true`.
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* `i8x16.eq(a: v128, b: v128) -> v128`
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* `i16x8.eq(a: v128, b: v128) -> v128`
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* `i32x4.eq(a: v128, b: v128) -> v128`
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* `i64x2.eq(a: v128, b: v128) -> v128`
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* `f32x4.eq(a: v128, b: v128) -> v128`
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* `f64x2.eq(a: v128, b: v128) -> v128`
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