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Fix encode, decode for load_zero (WebAssembly#391)
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ngzhian authored Nov 2, 2020
1 parent 2e2e494 commit 2f4dc50
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2 changes: 2 additions & 0 deletions interpreter/binary/decode.ml
Original file line number Diff line number Diff line change
Expand Up @@ -411,6 +411,8 @@ let simd_prefix s =
| 0xf9l -> i32x4_trunc_sat_f32x4_u
| 0xfal -> f32x4_convert_i32x4_s
| 0xfbl -> f32x4_convert_i32x4_u
| 0xfcl -> let a, o = memop s in v128_load32_zero a o
| 0xfdl -> let a, o = memop s in v128_load64_zero a o
| n -> illegal s pos (I32.to_int_u n)

let rec instr s =
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4 changes: 4 additions & 0 deletions interpreter/binary/encode.ml
Original file line number Diff line number Diff line change
Expand Up @@ -220,6 +220,10 @@ let encode m =
simd_op 0x09l; memop mo
| SimdLoad ({ty= V128Type; sz = Some (Pack64, PackSplat); _} as mo) ->
simd_op 0x0al; memop mo
| SimdLoad ({ty= V128Type; sz = Some (Pack32, PackZero); _} as mo) ->
simd_op 0xfcl; memop mo
| SimdLoad ({ty= V128Type; sz = Some (Pack64, PackZero); _} as mo) ->
simd_op 0xfdl; memop mo

| Store ({ty = I32Type; sz = None; _} as mo) -> op 0x36; memop mo
| Store ({ty = I64Type; sz = None; _} as mo) -> op 0x37; memop mo
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2 changes: 2 additions & 0 deletions interpreter/text/arrange.ml
Original file line number Diff line number Diff line change
Expand Up @@ -445,6 +445,8 @@ let simd_loadop (op : simd_loadop) =
| Pack16, PackSplat -> "16_splat"
| Pack32, PackSplat -> "32_splat"
| Pack64, PackSplat -> "64_splat"
| Pack32, PackZero -> "32_zero"
| Pack64, PackZero -> "64_zero"
| _ -> assert false
) in
memop ("load" ^ suffix) op (packed_size sz)
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