Skip to content
This repository has been archived by the owner on Nov 21, 2022. It is now read-only.

Commit

Permalink
EDAC, MCE, AMD: Add decoding table for MC6 xec
Browse files Browse the repository at this point in the history
Extended error code meanings are tabulated for other banks. Extend that
tradition for MC6 too.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link: http://lkml.kernel.org/r/1415122868-10969-1-git-send-email-aravind.gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
  • Loading branch information
Aravind Gopalakrishnan authored and suryasaimadhu committed Nov 4, 2014
1 parent a597d2a commit bc4febe
Showing 1 changed file with 11 additions and 30 deletions.
41 changes: 11 additions & 30 deletions drivers/edac/mce_amd.c
Original file line number Diff line number Diff line change
Expand Up @@ -138,6 +138,15 @@ static const char * const mc5_mce_desc[] = {
"Retire status queue"
};

static const char * const mc6_mce_desc[] = {
"Hardware Assertion",
"Free List",
"Physical Register File",
"Retire Queue",
"Scheduler table",
"Status Register File",
};

static bool f12h_mc0_mce(u16 ec, u8 xec)
{
bool ret = false;
Expand Down Expand Up @@ -672,38 +681,10 @@ static void decode_mc6_mce(struct mce *m)

pr_emerg(HW_ERR "MC6 Error: ");

switch (xec) {
case 0x0:
pr_cont("Hardware Assertion");
break;

case 0x1:
pr_cont("Free List");
break;

case 0x2:
pr_cont("Physical Register File");
break;

case 0x3:
pr_cont("Retire Queue");
break;

case 0x4:
pr_cont("Scheduler table");
break;

case 0x5:
pr_cont("Status Register File");
break;

default:
if (xec > 0x5)
goto wrong_mc6_mce;
break;
}

pr_cont(" parity error.\n");

pr_cont("%s parity error.\n", mc6_mce_desc[xec]);
return;

wrong_mc6_mce:
Expand Down

0 comments on commit bc4febe

Please sign in to comment.