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DSD Lab @ University of Tehran, Iran
CompArch Group @ National University of Singapore, Singapore
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University of tehran
- Iran, Singapore
- https://www.linkedin.com/in/monahashemi/
- https://scholar.google.com/citations?user=O56sNyEAAAAJ&hl=en
Highlights
- Pro
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Verilog_to_Bench
Verilog_to_Bench PublicVerilog to bench converter for <Tsmc18_component, fast.db>
Python
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