Fpu ci

.github/passed/default.txt

@@ -0,0 +1,2 @@
+v1024l8b2fp-test/debug/passed.txt
+v1024l8b2-test/debug/passed.txt

.github/passed/v1024l8b2fp-test/debug/passed.txt

@@ -0,0 +1,58 @@
+vfadd.vv-codegen
+vfadd.vf-codegen
+vfsub.vv-codegen
+vfsub.vf-codegen
+vfrsub.vf-codegen
+vfmul.vv-codegen
+vfmul.vf-codegen
+vfdiv.vv-codegen
+vfdiv.vf-codegen
+vfrdiv.vf-codegen
+vfmacc.vv-codegen
+vfmacc.vf-codegen
+vfnmacc.vv-codegen
+vfnmacc.vf-codegen
+vfmsac.vv-codegen
+vfmsac.vf-codegen
+vfnmsac.vv-codegen
+vfnmsac.vf-codegen
+vfmadd.vv-codegen
+vfmadd.vf-codegen
+vfnmadd.vv-codegen
+vfnmadd.vf-codegen
+vfmsub.vv-codegen
+vfmsub.vf-codegen
+vfnmsub.vv-codegen
+vfnmsub.vf-codegen
+vfsqrt.v-codegen
+vfrsqrt7.v-codegen
+vfrec7.v-codegen
+vfmin.vv-codegen
+vfmin.vf-codegen
+vfmax.vv-codegen
+vfmax.vf-codegen
+vfsgnj.vv-codegen
+vfsgnj.vf-codegen
+vfsgnjn.vv-codegen
+vfsgnjn.vf-codegen
+vfsgnjx.vv-codegen
+vfsgnjx.vf-codegen
+vmfeq.vv-codegen
+vmfeq.vf-codegen
+vmfne.vv-codegen
+vmfne.vf-codegen
+vmflt.vv-codegen
+vmflt.vf-codegen
+vmfgt.vf-codegen
+vmfge.vf-codegen
+vfclass.v-codegen
+vfmerge.vfm-codegen
+vfmv.v.f-codegen
+vfmv.f.s-codegen
+vfmv.s.f-codegen
+vfcvt.xu.f.v-codegen
+vfcvt.x.f.v-codegen
+vfcvt.rtz.xu.f.v-codegen
+vfcvt.rtz.x.f.v-codegen
+vfcvt.f.xu.v-codegen
+vfcvt.f.x.v-codegen

.github/scripts/ci.sc

@@ -2,11 +2,13 @@
 // A valid passedFile path should be like: /path/to/v1024l8b2-test/debug/passed.txt.
 //
 // @param passedFile Path to the passed.txt file
-def passed(passedFile: os.Path): Seq[String] = {
-  println(s"Generate tests from file: $passedFile")
-  val Seq(_, runType, verilatorType) = passedFile.segments.toSeq.reverse.slice(0, 3)
-  os.read.lines(passedFile)
-    .map(test => s"verilatorEmulator[$verilatorType,$test,$runType].run")
+def genRunTask(passedFiles: Seq[os.Path]): Seq[String] = {
+  passedFiles.flatMap(file => {
+    println(s"Generate tests from file: $file")
+    val Seq(_, runType, verilatorType) = file.segments.toSeq.reverse.slice(0, 3)
+    os.read.lines(file)
+      .map(test => s"verilatorEmulator[$verilatorType,$test,$runType].run")
+  })
 }
 
 // Resolve all the executable verilatorEmulator[$vtype,$ttype,$rtype].run object and execute them all.
@@ -29,13 +31,36 @@ def writeJson(buckets: Seq[String], outputFile: os.Path) =
   os.write.over(outputFile, ujson.Obj("include" -> 
     buckets.map(a => ujson.Obj(s"name" -> ujson.Str(a)))))
 
-// Read the passed.txt file, split the content into list of String and packed them up using the `bucket` function with specified bucket size.
+// Read the passed.txt file path from the given defaultPassed file,
+// split the content of the passed.txt file into list of String and packed them up using the `bucket` function with specified bucket size.
 // Write the generated json into given outputFile path.
 @main
-def passedJson(bucketSize: Int, passedFile: os.Path, outputFile: os.Path) = writeJson(buckets(passed(passedFile),bucketSize),outputFile)
+def passedJson(bucketSize: Int, defaultPassed: os.Path, outputFile: os.Path) =
+  writeJson(
+    buckets(
+      genRunTask(
+        os.read.lines(defaultPassed).map(defaultPassed / os.up / os.RelPath(_))
+      ),
+      bucketSize
+    ),
+    outputFile
+  )
 
 @main
-def unpassedJson(bucketSize: Int, root: os.Path, passedFile: os.Path, outputFile: os.Path) = writeJson(buckets((all(root).toSet -- passed(passedFile).toSet).toSeq,bucketSize),outputFile)
+def unpassedJson(
+    bucketSize: Int,
+    root: os.Path,
+    defaultPassed: os.Path,
+    outputFile: os.Path
+) = writeJson(
+  buckets(
+    (all(root).toSet -- genRunTask(
+      os.read.lines(defaultPassed).map(defaultPassed / os.up / os.RelPath(_))
+    ).toSet).toSeq,
+    bucketSize
+  ),
+  outputFile
+)
 
 @main
 def allJson(bucketSize: Int, root: os.Path, outputFile: os.Path) = writeJson(buckets(all(root),bucketSize),outputFile)
@@ -67,13 +92,14 @@ def runTest(root: os.Path, jobs: String, loggingDir: Option[os.Path]) = {
   os.makeDir.all(logDir)
   os.makeDir.all(logDir / "fail")
   val totalJobs = jobs.split(";")
+  // TODO: Use sliding(n, n) and scala.concurrent to run multiple test in parallel
   val failed = totalJobs.zipWithIndex
     .foldLeft(IndexedSeq[String]())(
       (failed, elem) => {
         val (job, i) = elem
         val logPath = logDir / s"$job.log"
         println(s"[$i/${totalJobs.length}] Running test case $job")
-        val handle = os.proc("mill", "--no-server", "-j", "0", job).call(
+        val handle = os.proc("mill", "--no-server", job).call(
           cwd=root,
           check=false,
           stdout=logPath,

.github/workflows/pr.yml

@@ -29,7 +29,7 @@ jobs:
             trusted-public-keys = cache.nixos.org-1:6NCHdD59X431o0gWypbMrAURkbJ16ZPMQFGspcDShjY= minio.inner.fi.c-3.moe:gDg5SOIH65O0tTV89dUawME5BTmduWWaA7as/cqvevM=
             extra-substituters = https://${{secrets.CACHE_DOMAIN}}/nix
       - id: ci-tests
-        run: nix develop .#testcase -c make ci-passed-tests PASSEDFILE=.github/passed/v1024l8b2-test/debug/passed.txt
+        run: nix develop .#testcase -c make ci-passed-tests DEFAULT_PASSED=.github/passed/default.txt
 
   ci:
     name: "CI"

Makefile

@@ -40,7 +40,7 @@ ci-run:
 
 ci-passed-tests:
 	echo -n matrix= >> $$GITHUB_OUTPUT
-	amm .github/scripts/ci.sc passedJson $(RUNNERS) $(PASSEDFILE) ./passed.json
+	amm .github/scripts/ci.sc passedJson $(RUNNERS) $(DEFAULT_PASSED) ./passed.json
 	cat ./passed.json >> $$GITHUB_OUTPUT
 
 ci-unpassed-tests:

build.sc

@@ -228,11 +228,8 @@ class Release(config: String) extends Module {
 }
 
 def emulatorTarget: Seq[String] = os.walk(os.pwd / "configs")
-  .filter(cfg => {
-    var filename = cfg.baseName
-    // TODO: remove fp filter after fp is supported
-    filename.contains("test") && !filename.contains("fp")
-  })
+  .filter(_.ext == "json")
+  .filter(_.baseName.contains("test"))
   .map(_.baseName)
 
 object emulator extends mill.Cross[emulator](emulatorTarget: _*)

configs/v1024l8b2fp-release.json

@@ -19,12 +19,7 @@
               },
               "generator": "v.MaskedLogic"
             },
-            [
-              0,
-              1,
-              2,
-              3
-            ]
+            [0, 1, 2, 3]
           ]
         ],
         "aluModuleParameters": [
@@ -35,9 +30,7 @@
               },
               "generator": "v.LaneAdder"
             },
-            [
-              0
-            ]
+            [0]
           ],
           [
             {
@@ -46,9 +39,7 @@
               },
               "generator": "v.LaneAdder"
             },
-            [
-              1
-            ]
+            [1]
           ],
           [
             {
@@ -57,9 +48,7 @@
               },
               "generator": "v.LaneAdder"
             },
-            [
-              2
-            ]
+            [2]
           ],
           [
             {
@@ -68,9 +57,7 @@
               },
               "generator": "v.LaneAdder"
             },
-            [
-              3
-            ]
+            [3]
           ]
         ],
         "shifterModuleParameters": [
@@ -81,12 +68,7 @@
               },
               "generator": "v.LaneShifter"
             },
-            [
-              0,
-              1,
-              2,
-              3
-            ]
+            [0, 1, 2, 3]
           ]
         ],
         "mulModuleParameters": [
@@ -97,12 +79,7 @@
               },
               "generator": "v.LaneMul"
             },
-            [
-              0,
-              1,
-              2,
-              3
-            ]
+            [0, 1, 2, 3]
           ]
         ],
         "divModuleParameters": [
@@ -113,12 +90,7 @@
               },
               "generator": "v.LaneDiv"
             },
-            [
-              0,
-              1,
-              2,
-              3
-            ]
+            [0, 1, 2, 3]
           ]
         ],
         "otherModuleParameters": [
@@ -133,12 +105,18 @@
               },
               "generator": "v.OtherUnit"
             },
-            [
-              0,
-              1,
-              2,
-              3
-            ]
+            [0, 1, 2, 3]
+          ]
+        ],
+        "floatModuleParameters": [
+          [
+            {
+              "parameter": {
+                "datapathWidth": 32
+              },
+              "generator": "v.LaneFloat"
+            },
+            [0, 1, 2, 3]
           ]
         ]
       }
@@ -147,15 +125,11 @@
   },
   "mfcArgs": [
     "-dedup",
-    "-O=release",
-    "--disable-all-randomization",
+    "-O=debug",
     "--split-verilog",
-    "--strip-debug-info",
-    "--preserve-values=none",
-    "--preserve-aggregate=all",
+    "--preserve-values=named",
     "--output-annotation-file=mfc.anno.json",
-    "--repl-seq-mem",
-    "--repl-seq-mem-file=repl-seq-mem.txt"
+    "--lowering-options=verifLabels"
   ],
   "testbench": false
 }

configs/v1024l8b2fp-test-trace.json

@@ -107,18 +107,29 @@
             },
             [0, 1, 2, 3]
           ]
+        ],
+        "floatModuleParameters": [
+          [
+            {
+              "parameter": {
+                "datapathWidth": 32
+              },
+              "generator": "v.LaneFloat"
+            },
+            [0, 1, 2, 3]
+          ]
         ]
       }
     },
     "generator": "v.V"
   },
   "mfcArgs": [
-   "-dedup",
-   "-O=debug",
-   "--split-verilog",
-   "--preserve-values=named",
-   "--output-annotation-file=mfc.anno.json",
-   "--lowering-options=verifLabels"
+    "-dedup",
+    "-O=debug",
+    "--split-verilog",
+    "--preserve-values=named",
+    "--output-annotation-file=mfc.anno.json",
+    "--lowering-options=verifLabels"
   ],
   "testbench": true,
   "trace": true

configs/v1024l8b2fp-test.json

@@ -107,6 +107,17 @@
             },
             [0, 1, 2, 3]
           ]
+        ],
+        "floatModuleParameters": [
+          [
+            {
+              "parameter": {
+                "datapathWidth": 32
+              },
+              "generator": "v.LaneFloat"
+            },
+            [0, 1, 2, 3]
+          ]
         ]
       }
     },

tests/configs/vfadd.vf-codegen.json

@@ -0,0 +1,8 @@
+{
+  "name": "vfadd.vf",
+  "type": "codegen",
+  "vlen": 1024,
+  "xlen": 32,
+  "fp": true,
+  "compileOptions": [ "-mabi=ilp32f", "-march=rv32gcv", "-mno-relax", "-static", "-mcmodel=medany", "-fvisibility=hidden", "-nostdlib", "-fno-PIC" ]
+}

tests/configs/vfadd.vv-codegen.json

@@ -0,0 +1,8 @@
+{
+  "name": "vfadd.vv",
+  "type": "codegen",
+  "vlen": 1024,
+  "xlen": 32,
+  "fp": true,
+  "compileOptions": [ "-mabi=ilp32f", "-march=rv32gcv", "-mno-relax", "-static", "-mcmodel=medany", "-fvisibility=hidden", "-nostdlib", "-fno-PIC" ]
+}

tests/configs/vfclass.v-codegen.json

@@ -0,0 +1,8 @@
+{
+  "name": "vfclass.v",
+  "type": "codegen",
+  "vlen": 1024,
+  "xlen": 32,
+  "fp": true,
+  "compileOptions": [ "-mabi=ilp32f", "-march=rv32gcv", "-mno-relax", "-static", "-mcmodel=medany", "-fvisibility=hidden", "-nostdlib", "-fno-PIC" ]
+}