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SFLL_rem

SFLL-rem [1] is the latest logic locking technique improving upon the existing technique SFLL [2], while holding the same theoretical guarantees. This platform is to enable you to attack and decrypt our latest solution SFLL-rem.

Toward that end, the traditional threat model is assumed, where the attacker has the following capabilities:

  1. Complete reverse-engineered (RE) locked netlist except the locking key.
  2. Access to a working oracle or an activated IC.

In this repository, we provide the above two entities as follows:

  1. RE locked netlist - The RE locked netlist is provided as SFLL_fault.bench which is locked using 128 bit key.
  2. Access to the oracle is provided in the form of a binary executable Vour. The oracle executable has been compiled for Ubuntu 16.04.5 LTS (Xenial Xerus) and generated using Verilator tool from Veripool. For correct execution of the executable, you also need to install the tool available at: http://www.veripool.org/wiki/verilator.

Oracle information

Number of PIs = 892 Number of POs = 1746

To run the oracle executable, just use: ./Vour input_pattern (with space after each bit)

Example - ./Vour 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0

output: 11100101010101000110101001001010000000000001101000111000100000000010101011101111111011101110101110101110111011101110101010101110101110111011101010101000000010101010111110101101000101000101111111111001101110110010111010101110110001000100010001000001000100010001000100010000010000010001000100010001000100010000010001000100000000000000000000010101010101010101010101010101010101000100010001000001000000010001000100010001000100000100010001000100010001000001000001000100010001000100010001000001000100010000000000000001000000010101010101010101010101010101010100010001000100000100000001000100010001000100010000010001000100010001000100000100000100010001000100010001000100000100010001000000000000001010000101010101010101010101010101010101010001000100010000010000000100010001000100010001000001000100010001000100010000010000010001000100010001000100010000010001000100000000000000000000010101010101010101010101010101010101000100010001000001000000010001000100010001000100000100010001000100010001000001000001000100010001000100010001000001000100010000000000000000000001010101010101010101010101010101010100010001000100000100000001000100010001000100010000010001000100010001000100000100000100010001000100010001000100000100010001000000000000000000000101010101010101010101010101010101010001000100010000010000000100010001000100010001000001000100010001000100010000010000010001000100010001000110111010111010000100000000000000000000010111111111111111110101010101010101000100010001000001101010010000000100010001000100000100010001000100010001100001000001000100010001001100111011101011101100000010101010100011101011111111110101010101010101111111110100010001001100000100000001001110111011101110110000110001100100011011001110101100000100010001000110110001000110000100010001000

[1] "Truly Stripping Functionality for Logic Locking: A Fault-based Perspective". A Sengupta, M Nabeel, N Limaye, M Ashraf, and O Sinanoglu. TCAD 2020.

[2] "Provably-Secure Logic Locking: From Theory To Practice". M Yasin, A Sengupta, M Nabeel, M Ashraf, JV Rajendran, and O Sinanoglu. CCS 2017.

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