Hold GC1109 FEM power during deep sleep for LNA RX wake #9572
+37
−2
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Summary
rtc_gpio_hold_ento latchPA_POWER(LDO) andPA_EN(CSD) HIGH during deep sleep, keeping the GC1109 LNA powered for wake-on-packet RXinitDeepSleep)SX126xInterface::init()after setting GPIO registers HIGH first, avoiding a power glitchBackground
Previously, the GC1109 FEM power pins used weak internal pull-ups (
gpio_pullup_en) during deep sleep, which is less reliable than explicitly latching the pad state. Additionally,SX126xInterface::sleep()setsPA_ENLOW beforeenableLoraInterrupt()re-enables it, creating a window where the GC1109 could lose power.The blanket
rtc_gpio_hold_disloop ininitDeepSleep()also released these pins beforeSX126xInterface::init()had a chance to set them HIGH, causing a brief power glitch on every deep sleep wake.Without this fix, the GC1109 LNA could be unpowered during sleep, degrading RX wake sensitivity by ~17dB.
The TLV75733P LDO has a startup time (tSTR) of ~550us. On cold boot,
PA_EN(CSD) was being driven HIGH only ~12.5us afterPA_POWER, before the LDO output had stabilised. The GC1109 datasheet requires "VBAT must be prior to CSD/CPS/CTX for the power on sequence". On deep sleep wake the LDO is held on via RTC latch, so no delay is needed.Trade-off: ~1.2mA additional deep sleep current for significantly improved wake-on-packet range.
Reference: meshcore-dev/MeshCore#1600
Reference: #9029 (comments by @compumike, @ascendr, @lindorffs)
Test plan