[WIP] Inline farcall #669
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[WIP] Inline farcall #669
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Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This patch is fixing bug in block placement pass that can wrongly reorder fall through BBs when the new jump table instruction is the last instruction in a BB. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This fixes the crash where inner loop is not a simplified form and we are traversing over the basic blocks of the outer loop and attempt to rewrite the inner GEP instruction using the preheader and latch basic blocks of the outer loop. Additionally, this code adds a paranoia check to ensure that the PHI node of the BasePtr has the preheader and latch basic blocks as incoming blocks. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Since GR256 and GRPTR have the same physical registers, IsFatPtr MI flag needs to be propagated for COPY instruction after the register allocation phase, so COPY instruction can be lowered correctly to a real instruction. This patch implements PHI node elimination TII hooks, so we can tag fatptr copies when needed. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This issue occurs when DAGCombiner in visitXOR incorrectly folds !(x cc y) to (x !cc y) because isConstTrueVal returns true for -1 constant. Fix this issue by setting that true and false are represented with 1 and 0 values. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Update codegen pipeline: * enable more opt passes (also add an option to make possible disabling the passes since they hardens testing basic functionality); * disable passes that do nothing for EraVM; * test the pipeline.
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
By the time of ifcvt, we deal with LOADCONST pseudo that isn't predicated. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This will allow IfConversion to optimize more cases, since it will work on real instructions that can be predicated. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
In build without asserts, some tests are trapped in the infinite loop in the Legalizer. Skip running these tests. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
The patch adds a pass that merges two identical basic blocks. The logic is borrowed from https://reviews.llvm.org/D82730, but unlike the original PR, it's extracted to a separate pass which is scheduled after simplify CFG. The patch also contain a fix by Vladimir Radosavljevic that removes unreachable blocks before merging.
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This optimization is not profitable for us, since we have urem instruction. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
`EraVMLinkRuntime` and `EVMLinkRuntime` don't invalidate analyses when update a module. The patch invalidates all analyses if there were changes.
In some cases, IfConverter can pass max 32-bit unsigned value for TrueCycles and 0 for FalseCycles. Problem in this case is that Denominator will be 0, and BranchProbability will assert. Add check to avoid assertion in BranchProbability constructor. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
HACK: It seems llvm-config is not supposed to work with lld by design. At the same time, we need lld support in llvm-config because the 'inkwell' package gathers the linking dependencies by llvm-config.
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This section is not used, so disable generation of it. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This resolves the issue #624.
This is a workaround for suspicious crashes/hanging ups happening with lld-as-a-library. TODO: ##677, needs to figure out exact reason.
This also includes a C-API function to check the bytecode limits.
We don't need TargetPassConfig and TargetTransformInfo analyses and initialize pass dependencies. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Refactor code to check whether BasePtr is increased by one cell per iteration. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
…psPrepare In case we generate GEP that doesn't dominate latch BB, we will run into an issue and verifier will complain: ``` Instruction does not dominate all uses! %3 = getelementptr inbounds i256, ptr addrspace(1) %0, i256 1 %0 = phi ptr addrspace(1) [ %arg3, %bb1 ], [ %3, %bb5 ] ``` This patch fixes this issue. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
This includes:
1. Increasing the stack pointer according to the number of global variables.
nop stack+=[NumCells + r0]
2. Duplication of intializers in the code section and copying them to
corresponding stack items.
add @glob_initializer[0], r0, stack[@glob]
...
3. Generation of default landing pads.
DEFAULT_UNWIND:
ret.panic.to_label @DEFAULT_UNWIND
DEFAULT_FAR_RETURN:
ret.ok.to_label r1, @DEFAULT_FAR_RETURN
DEFAULT_FAR_REVERT:
ret.revert.to_label r1, @DEFAULT_FAR_REVERT
1. code[@symbol + reg + imm] Denotes indirect code reference. Loads a word from the code page at the offset (measured in words): "@symbol + reg + imm". 2. @symbol + imm Just denotes the expression value itself. @symbol is resolved as an offset to the label measured in instructions. add @.OUTLINED_FUNCTION_RET2[0], r0, stack[-1]
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