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no need for tool dependent var
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sakshi15108 committed Nov 26, 2023
1 parent 82e7066 commit a7b1670
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Showing 2 changed files with 4 additions and 12 deletions.
11 changes: 2 additions & 9 deletions inou/locator/traverse_lg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,6 @@ void Traverse_lg::setup() {
// m1.add_label_optional("odir", "path to print the text to", ".");
m1.add_label_required("LGorig", "LG name of the original or pre-synth LG.");
m1.add_label_required("LGsynth", "LG name of synthesized or post-synth LG.");
m1.add_label_optional("synth_tool", "if synth done via Design Compiler, then enter synth_tool:DC");
register_pass(m1);
}

Expand All @@ -32,7 +31,6 @@ void Traverse_lg::travers(Eprp_var& var) {
auto lg_synth_name = var.get("LGsynth");

Traverse_lg p(var);
p.synth_tool = var.get("synth_tool");
p.orig_lg_name = std::string(lg_orig_name);
// p.synth_lg_name = std::string(lg_synth_name);
#ifdef DE_DUP
Expand Down Expand Up @@ -1601,13 +1599,8 @@ void Traverse_lg::remove_pound_and_bus(std::string& dpin_name) {
if (dpin_name.find("%") != std::string::npos) { // for cases like registers.%io_readdata2|63
dpin_name.erase(dpin_name.find("%"), 1);
}
if (dpin_name.find(".") != std::string::npos) { // to address: The "pmp.io.addr" in DT2 yosys trial
std::replace( dpin_name.begin(), dpin_name.end(), '.', '_');// convert all '.' to '_'
}
if (synth_tool == "DC"
&& dpin_name.find(".")
!= std::string::npos) { // in case the synth tool is DC, then "." in LGorig will have to be converted to "_"
dpin_name[dpin_name.find(".")] = '_';
if (dpin_name.find(".") != std::string::npos) { // to address: The "pmp.io.addr" in DT2 yosys trial
std::replace( dpin_name.begin(), dpin_name.end(), '.', '_');// convert all '.' to '_'
}
}

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5 changes: 2 additions & 3 deletions inou/locator/traverse_lg.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,9 +27,8 @@
class Traverse_lg : public Pass {
public:
private:
std::string orig_lg_name;
std::string synth_tool;
// std::string synth_lg_name;
std::string orig_lg_name;
// std::string synth_lg_name;
typedef absl::node_hash_map<Node::Compact_flat, std::pair<std::set<std::string>, std::set<std::string>>> setMap_nodeKey;
typedef absl::node_hash_map<std::pair<std::set<std::string>, std::set<std::string>>, std::vector<Node::Compact_flat>>
setMap_pairKey;
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