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Merge tag 'spi-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git…
…/broonie/spi
Pull spi updates from Mark Brown:
"Not the biggest set of changes for SPI but a bit of a pickup in
activity on the core:
- Support for memory mapped read from flash devices via a SPI
controller.
- The beginnings of a message rewriting framework in the core which
should in time allow us to support transforming messages to work
around the limits of controllers or optimise the performance for
controllers transparently to calling drivers.
- Updates to the PXA2xx, the main functional change being to improve
the ACPI support.
- A new driver for the Analog Devices AXI SPI engine"
* tag 'spi-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (66 commits)
spi: Add gfp parameter to kernel-doc to fix build warning
spi: Fix htmldocs build error due struct spi_replaced_transfers
spi: rockchip: covert rsd_nsecs to u32 type
spi: rockchip: header file cleanup
spi: xilinx: Add devicetree binding for spi-xilinx
spi: respect the maximum segment size of DMA device
spi: rockchip: check requesting dma channel with EPROBE_DEFER
spi: rockchip: migrate to dmaengine_terminate_async
spi: rockchip: check return value of dmaengine_prep_slave_sg
spi: core: Fix deadlock when sending messages
spi/rockchip: fix endian mode for 16-bit transfers
spi/rockchip: Make sure spi clk is on in rockchip_spi_set_cs
spi: pxa2xx: Use newer more explicit DMAengine terminate API
spi: pxa2xx: Add support for Intel Broxton B-Step
spi: lp-8841: return correct error code from probe
spi: imx: drop bogus tests for rx/tx bufs in DMA transfer
spi: imx: set MX51_ECSPI_CTRL_SMC bit in setup function
spi: imx: make some register defines simpler
spi: imx: remove unnecessary bit clearing in mx51_ecspi_config
spi: imx: add support for all SPI word width for DMA
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31
Documentation/devicetree/bindings/spi/adi,axi-spi-engine.txt
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| Analog Devices AXI SPI Engine controller Device Tree Bindings | ||
|
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| Required properties: | ||
| - compatible : Must be "adi,axi-spi-engine-1.00.a"" | ||
| - reg : Physical base address and size of the register map. | ||
| - interrupts : Property with a value describing the interrupt | ||
| number. | ||
| - clock-names : List of input clock names - "s_axi_aclk", "spi_clk" | ||
| - clocks : Clock phandles and specifiers (See clock bindings for | ||
| details on clock-names and clocks). | ||
| - #address-cells : Must be <1> | ||
| - #size-cells : Must be <0> | ||
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| Optional subnodes: | ||
| Subnodes are use to represent the SPI slave devices connected to the SPI | ||
| master. They follow the generic SPI bindings as outlined in spi-bus.txt. | ||
|
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| Example: | ||
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| spi@@44a00000 { | ||
| compatible = "adi,axi-spi-engine-1.00.a"; | ||
| reg = <0x44a00000 0x1000>; | ||
| interrupts = <0 56 4>; | ||
| clocks = <&clkc 15 &clkc 15>; | ||
| clock-names = "s_axi_aclk", "spi_clk"; | ||
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| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
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| /* SPI devices */ | ||
| }; |
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54
Documentation/devicetree/bindings/spi/icpdas-lp8841-spi-rtc.txt
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| * ICP DAS LP-8841 SPI Controller for RTC | ||
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| ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO | ||
| memory register, which acts as an SPI master device. | ||
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| The device uses the standard MicroWire half-duplex transfer timing. | ||
| Master output is set on low clock and sensed by the RTC on the rising | ||
| edge. Master input is set by the RTC on the trailing edge and is sensed | ||
| by the master on low clock. | ||
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| Required properties: | ||
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| - #address-cells: should be 1 | ||
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| - #size-cells: should be 0 | ||
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| - compatible: should be "icpdas,lp8841-spi-rtc" | ||
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| - reg: should provide IO memory address | ||
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| Requirements to SPI slave nodes: | ||
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| - There can be only one slave device. | ||
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| - The spi slave node should claim the following flags which are | ||
| required by the spi controller. | ||
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| - spi-3wire: The master itself has only 3 wire. It cannor work in | ||
| full duplex mode. | ||
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| - spi-cs-high: DS-1302 has active high chip select line. The master | ||
| doesn't support active low. | ||
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| - spi-lsb-first: DS-1302 requires least significant bit first | ||
| transfers. The master only support this type of bit ordering. | ||
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| Example: | ||
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| spi@901c { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| compatible = "icpdas,lp8841-spi-rtc"; | ||
| reg = <0x901c 0x1>; | ||
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| rtc@0 { | ||
| compatible = "maxim,ds1302"; | ||
| reg = <0>; | ||
| spi-max-frequency = <500000>; | ||
| spi-3wire; | ||
| spi-lsb-first; | ||
| spi-cs-high; | ||
| }; | ||
| }; |
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| Xilinx SPI controller Device Tree Bindings | ||
| ------------------------------------------------- | ||
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| Required properties: | ||
| - compatible : Should be "xlnx,xps-spi-2.00.a" or "xlnx,xps-spi-2.00.b" | ||
| - reg : Physical base address and size of SPI registers map. | ||
| - interrupts : Property with a value describing the interrupt | ||
| number. | ||
| - interrupt-parent : Must be core interrupt controller | ||
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| Optional properties: | ||
| - xlnx,num-ss-bits : Number of chip selects used. | ||
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| Example: | ||
| axi_quad_spi@41e00000 { | ||
| compatible = "xlnx,xps-spi-2.00.a"; | ||
| interrupt-parent = <&intc>; | ||
| interrupts = <0 31 1>; | ||
| reg = <0x41e00000 0x10000>; | ||
| xlnx,num-ss-bits = <0x1>; | ||
| }; | ||
|
|
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