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arm64: dts: ti: k3-am625-sk: Add boot phase tags marking
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bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.

Describe the same for am625-sk boot devices.

Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230911162535.1044560-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@nmenon @r-vignesh
nmenon authored and r-vignesh committed Oct 2, 2023
1 parent 944adef commit c412c2f
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27 changes: 27 additions & 0 deletions arch/arm64/boot/dts/ti/k3-am625-sk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,7 @@

vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
Expand All @@ -41,6 +42,7 @@

vcc_5v0: regulator-1 {
/* Output of LM34936 */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
Expand All @@ -52,6 +54,7 @@

vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
Expand All @@ -63,6 +66,7 @@

vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
Expand All @@ -75,6 +79,7 @@

vdd_sd_dv: regulator-4 {
/* Output of TLV71033 */
bootph-all;
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
Expand Down Expand Up @@ -102,6 +107,7 @@

&main_pmx0 {
main_rgmii2_pins_default: main-rgmii2-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
Expand All @@ -119,6 +125,7 @@
};

ospi0_pins_default: ospi0-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
Expand All @@ -135,20 +142,32 @@
};

vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};

main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
};

&main_gpio0 {
bootph-all;
};

&main_gpio1 {
bootph-all;
};

&main_i2c1 {
bootph-all;
exp1: gpio@22 {
bootph-all;
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
Expand Down Expand Up @@ -207,12 +226,18 @@
};
};

&fss {
bootph-all;
};

&ospi0 {
bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;

flash@0 {
bootph-all;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
Expand All @@ -225,6 +250,7 @@
cdns,read-delay = <4>;

partitions {
bootph-all;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
Expand Down Expand Up @@ -260,6 +286,7 @@
};

partition@3fc0000 {
bootph-pre-ram;
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
};
Expand Down
16 changes: 16 additions & 0 deletions arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@
};

memory@80000000 {
bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
Expand Down Expand Up @@ -130,13 +131,15 @@
&main_pmx0 {
/* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
>;
};

main_uart1_pins_default: main-uart1-default-pins {
bootph-pre-ram;
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
Expand Down Expand Up @@ -167,6 +170,7 @@
};

main_mmc0_pins_default: main-mmc0-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
Expand All @@ -182,6 +186,7 @@
};

main_mmc1_pins_default: main-mmc1-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
Expand All @@ -207,6 +212,7 @@
};

main_rgmii1_pins_default: main-rgmii1-default-pins {
bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
Expand Down Expand Up @@ -274,6 +280,7 @@

&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
bootph-pre-ram;
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
Expand All @@ -285,19 +292,22 @@

&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
};

&main_uart0 {
bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};

&main_uart1 {
/* Main UART1 is used by TIFS firmware */
bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
Expand Down Expand Up @@ -390,6 +400,7 @@
};

&sdhci0 {
bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
Expand All @@ -399,6 +410,7 @@

&sdhci1 {
/* SD/MMC */
bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
Expand All @@ -407,21 +419,25 @@
};

&cpsw3g {
bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
};

&cpsw_port1 {
bootph-all;
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};

&cpsw3g_mdio {
bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>;

cpsw3g_phy0: ethernet-phy@0 {
bootph-all;
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
Expand Down

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