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Merge tag 'asoc-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/…
…git/broonie/sound into for-next ASoC: Updates for v6.4 The bulk of the commits here are for the conversion of drivers to use void remove callbacks but there's a reasonable amount of other stuff going on, the pace of development with the SOF code continues to be high and there's a bunch of new drivers too: - More core cleanups from Morimto-san. - Update drivers to have remove() callbacks returning void, mostly mechanical with some substantial changes. - Continued feature and simplification work on SOF, including addition of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4 protocol. - Hibernation support for CS35L45. - More DT binding conversions. - Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363, nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car Gen4, Rockchip RK3588 and TI TAS5733.
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Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: PowerQUICC CPM QUICC Multichannel Controller (QMC) | ||
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maintainers: | ||
- Herve Codina <herve.codina@bootlin.com> | ||
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description: | ||
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one | ||
serial controller using the same TDM physical interface routed from TSA. | ||
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properties: | ||
compatible: | ||
items: | ||
- enum: | ||
- fsl,mpc885-scc-qmc | ||
- fsl,mpc866-scc-qmc | ||
- const: fsl,cpm1-scc-qmc | ||
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reg: | ||
items: | ||
- description: SCC (Serial communication controller) register base | ||
- description: SCC parameter ram base | ||
- description: Dual port ram base | ||
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reg-names: | ||
items: | ||
- const: scc_regs | ||
- const: scc_pram | ||
- const: dpram | ||
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interrupts: | ||
maxItems: 1 | ||
description: SCC interrupt line in the CPM interrupt controller | ||
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fsl,tsa-serial: | ||
$ref: /schemas/types.yaml#/definitions/phandle-array | ||
items: | ||
- items: | ||
- description: phandle to TSA node | ||
- enum: [1, 2, 3] | ||
description: | | ||
TSA serial interface (dt-bindings/soc/cpm1-fsl,tsa.h defines these | ||
values) | ||
- 1: SCC2 | ||
- 2: SCC3 | ||
- 3: SCC4 | ||
description: | ||
Should be a phandle/number pair. The phandle to TSA node and the TSA | ||
serial interface to use. | ||
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'#address-cells': | ||
const: 1 | ||
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'#size-cells': | ||
const: 0 | ||
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patternProperties: | ||
'^channel@([0-9]|[1-5][0-9]|6[0-3])$': | ||
description: | ||
A channel managed by this controller | ||
type: object | ||
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properties: | ||
reg: | ||
minimum: 0 | ||
maximum: 63 | ||
description: | ||
The channel number | ||
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fsl,operational-mode: | ||
$ref: /schemas/types.yaml#/definitions/string | ||
enum: [transparent, hdlc] | ||
default: transparent | ||
description: | | ||
The channel operational mode | ||
- hdlc: The channel handles HDLC frames | ||
- transparent: The channel handles raw data without any processing | ||
fsl,reverse-data: | ||
$ref: /schemas/types.yaml#/definitions/flag | ||
description: | ||
The bit order as seen on the channels is reversed, | ||
transmitting/receiving the MSB of each octet first. | ||
This flag is used only in 'transparent' mode. | ||
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fsl,tx-ts-mask: | ||
$ref: /schemas/types.yaml#/definitions/uint64 | ||
description: | ||
Channel assigned Tx time-slots within the Tx time-slots routed by the | ||
TSA to this cell. | ||
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fsl,rx-ts-mask: | ||
$ref: /schemas/types.yaml#/definitions/uint64 | ||
description: | ||
Channel assigned Rx time-slots within the Rx time-slots routed by the | ||
TSA to this cell. | ||
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required: | ||
- reg | ||
- fsl,tx-ts-mask | ||
- fsl,rx-ts-mask | ||
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required: | ||
- compatible | ||
- reg | ||
- reg-names | ||
- interrupts | ||
- fsl,tsa-serial | ||
- '#address-cells' | ||
- '#size-cells' | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/soc/cpm1-fsl,tsa.h> | ||
qmc@a60 { | ||
compatible = "fsl,mpc885-scc-qmc", "fsl,cpm1-scc-qmc"; | ||
reg = <0xa60 0x20>, | ||
<0x3f00 0xc0>, | ||
<0x2000 0x1000>; | ||
reg-names = "scc_regs", "scc_pram", "dpram"; | ||
interrupts = <27>; | ||
interrupt-parent = <&CPM_PIC>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
fsl,tsa-serial = <&tsa FSL_CPM_TSA_SCC4>; | ||
channel@16 { | ||
/* Ch16 : First 4 even TS from all routed from TSA */ | ||
reg = <16>; | ||
fsl,mode = "transparent"; | ||
fsl,reverse-data; | ||
fsl,tx-ts-mask = <0x00000000 0x000000aa>; | ||
fsl,rx-ts-mask = <0x00000000 0x000000aa>; | ||
}; | ||
channel@17 { | ||
/* Ch17 : First 4 odd TS from all routed from TSA */ | ||
reg = <17>; | ||
fsl,mode = "transparent"; | ||
fsl,reverse-data; | ||
fsl,tx-ts-mask = <0x00000000 0x00000055>; | ||
fsl,rx-ts-mask = <0x00000000 0x00000055>; | ||
}; | ||
channel@19 { | ||
/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */ | ||
reg = <19>; | ||
fsl,mode = "hdlc"; | ||
fsl,tx-ts-mask = <0x00000000 0x0000ff00>; | ||
fsl,rx-ts-mask = <0x00000000 0x0000ff00>; | ||
}; | ||
}; |
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