arm64: dts: renesas: r9a07g043u: Update pinctrl node to handle GPIO i…

…nterrupts Add required properties in pinctrl node to handle GPIO interrupts. Note as IRQC is not enabled in RZ/Five the phandle for interrupt-parent is added in RZ/G2UL specific dtsi so that RZ/Five pinctrl driver continues without waiting for IRQC to probe. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230102221815.273719-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
mariobalanica · Jan 26, 2023 · 85169df · 85169df
1 parent 48ab6ed
commit 85169df
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diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -531,6 +531,8 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 			gpio-ranges = <&pinctrl 0 0 152>;
+			#interrupt-cells = <2>;
+			interrupt-controller;
 			clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>;
 			power-domains = <&cpg>;
 			resets = <&cpg R9A07G043_GPIO_RSTN>,

diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -49,6 +49,10 @@
 	};
 };
 
+&pinctrl {
+	interrupt-parent = <&irqc>;
+};
+
 &soc {
 	interrupt-parent = <&gic>;
-Original file line number
+Diff line change
@@ Expand Up / @@ -49,6 +49,10 @@ @@
     	};
     };
+    &pinctrl {
+    	interrupt-parent = <&irqc>;
+    };
     &soc {
     	interrupt-parent = <&gic>;
@@ Expand Down @@