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Merge git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32…
…-2.6 * git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: avr32: Fix GPIO initcall breakage avr32: Scale loops_per_jiffy when cpu frequency changes avr32: Fix bug in LCD pin setup on port C avr32: Add defconfig for the favr-32 board avr32: Add defconfig for the mimc200 board avr32: Add MIMC200 board support avr32: Fix MIMC200 board use of SPD network pins avr32: add support for EarthLCD Favr-32 board avr32: Add support for EVKLCD10X addon boards avr32: Kconfig: Remove pointless if around atstk1000 include
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# NGW100 customization | ||
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if BOARD_ATNGW100 | ||
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config BOARD_ATNGW100_EVKLCD10X | ||
bool "Add support for EVKLCD10X addon board" | ||
help | ||
This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA) | ||
addon board for the NGW100. By enabling this the LCD controller and | ||
AC97 controller is added as platform devices. | ||
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This choice disables the detect pin and the write-protect pin for the | ||
MCI platform device, since it conflicts with the LCD platform device. | ||
The MCI pins can be reenabled by editing the "add device function" but | ||
this may break the setup for other displays that use these pins. | ||
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Choose 'Y' here if you have a EVKLCD100/101 connected to the NGW100. | ||
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choice | ||
prompt "LCD panel resolution on EVKLCD10X" | ||
depends on BOARD_ATNGW100_EVKLCD10X | ||
default BOARD_ATNGW100_EVKLCD10X_VGA | ||
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config BOARD_ATNGW100_EVKLCD10X_QVGA | ||
bool "QVGA (320x240)" | ||
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config BOARD_ATNGW100_EVKLCD10X_VGA | ||
bool "VGA (640x480)" | ||
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config BOARD_ATNGW100_EVKLCD10X_POW_QVGA | ||
bool "Powertip QVGA (320x240)" | ||
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endchoice | ||
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endif # BOARD_ATNGW100 |
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obj-y += setup.o flash.o | ||
obj-y += setup.o flash.o | ||
obj-$(CONFIG_BOARD_ATNGW100_EVKLCD10X) += evklcd10x.o |
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/* | ||
* Board-specific setup code for the ATEVKLCD10X addon board to the ATNGW100 | ||
* Network Gateway | ||
* | ||
* Copyright (C) 2008 Atmel Corporation | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License version 2 as published by | ||
* the Free Software Foundation. | ||
*/ | ||
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#include <linux/init.h> | ||
#include <linux/linkage.h> | ||
#include <linux/fb.h> | ||
#include <linux/platform_device.h> | ||
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#include <video/atmel_lcdc.h> | ||
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#include <asm/setup.h> | ||
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#include <mach/at32ap700x.h> | ||
#include <mach/board.h> | ||
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static struct ac97c_platform_data __initdata ac97c0_data = { | ||
.dma_rx_periph_id = 3, | ||
.dma_tx_periph_id = 4, | ||
.dma_controller_id = 0, | ||
.reset_pin = GPIO_PIN_PB(19), | ||
}; | ||
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#ifdef CONFIG_BOARD_ATNGW100_EVKLCD10X_VGA | ||
static struct fb_videomode __initdata tcg057vglad_modes[] = { | ||
{ | ||
.name = "640x480 @ 60", | ||
.refresh = 60, | ||
.xres = 640, .yres = 480, | ||
.pixclock = KHZ2PICOS(25180), | ||
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.left_margin = 64, .right_margin = 31, | ||
.upper_margin = 34, .lower_margin = 2, | ||
.hsync_len = 96, .vsync_len = 4, | ||
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.sync = 0, | ||
.vmode = FB_VMODE_NONINTERLACED, | ||
}, | ||
}; | ||
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static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
.manufacturer = "KYO", | ||
.monitor = "TCG057VGLAD", | ||
.modedb = tcg057vglad_modes, | ||
.modedb_len = ARRAY_SIZE(tcg057vglad_modes), | ||
.hfmin = 19948, | ||
.hfmax = 31478, | ||
.vfmin = 50, | ||
.vfmax = 67, | ||
.dclkmax = 28330000, | ||
}; | ||
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static struct atmel_lcdfb_info __initdata atevklcd10x_lcdc_data = { | ||
.default_bpp = 16, | ||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
| ATMEL_LCDC_MEMOR_BIG), | ||
.default_monspecs = &atevklcd10x_default_monspecs, | ||
.guard_time = 2, | ||
}; | ||
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_QVGA | ||
static struct fb_videomode __initdata tcg057qvlad_modes[] = { | ||
{ | ||
.name = "320x240 @ 60", | ||
.refresh = 60, | ||
.xres = 320, .yres = 240, | ||
.pixclock = KHZ2PICOS(6300), | ||
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.left_margin = 52, .right_margin = 28, | ||
.upper_margin = 7, .lower_margin = 2, | ||
.hsync_len = 96, .vsync_len = 4, | ||
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.sync = 0, | ||
.vmode = FB_VMODE_NONINTERLACED, | ||
}, | ||
}; | ||
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static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
.manufacturer = "KYO", | ||
.monitor = "TCG057QVLAD", | ||
.modedb = tcg057qvlad_modes, | ||
.modedb_len = ARRAY_SIZE(tcg057qvlad_modes), | ||
.hfmin = 19948, | ||
.hfmax = 31478, | ||
.vfmin = 50, | ||
.vfmax = 67, | ||
.dclkmax = 7000000, | ||
}; | ||
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static struct atmel_lcdfb_info __initdata atevklcd10x_lcdc_data = { | ||
.default_bpp = 16, | ||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
| ATMEL_LCDC_MEMOR_BIG), | ||
.default_monspecs = &atevklcd10x_default_monspecs, | ||
.guard_time = 2, | ||
}; | ||
#elif CONFIG_BOARD_ATNGW100_EVKLCD10X_POW_QVGA | ||
static struct fb_videomode __initdata ph320240t_modes[] = { | ||
{ | ||
.name = "320x240 @ 60", | ||
.refresh = 60, | ||
.xres = 320, .yres = 240, | ||
.pixclock = KHZ2PICOS(6300), | ||
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.left_margin = 38, .right_margin = 20, | ||
.upper_margin = 15, .lower_margin = 5, | ||
.hsync_len = 30, .vsync_len = 3, | ||
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.sync = 0, | ||
.vmode = FB_VMODE_NONINTERLACED, | ||
}, | ||
}; | ||
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static struct fb_monspecs __initdata atevklcd10x_default_monspecs = { | ||
.manufacturer = "POW", | ||
.monitor = "PH320240T", | ||
.modedb = ph320240t_modes, | ||
.modedb_len = ARRAY_SIZE(ph320240t_modes), | ||
.hfmin = 14400, | ||
.hfmax = 21600, | ||
.vfmin = 50, | ||
.vfmax = 90, | ||
.dclkmax = 6400000, | ||
}; | ||
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static struct atmel_lcdfb_info __initdata atevklcd10x_lcdc_data = { | ||
.default_bpp = 16, | ||
.default_dmacon = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN, | ||
.default_lcdcon2 = (ATMEL_LCDC_DISTYPE_TFT | ||
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE | ||
| ATMEL_LCDC_MEMOR_BIG), | ||
.default_monspecs = &atevklcd10x_default_monspecs, | ||
.guard_time = 2, | ||
}; | ||
#endif | ||
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static int __init atevklcd10x_init(void) | ||
{ | ||
at32_add_device_ac97c(0, &ac97c0_data); | ||
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at32_add_device_lcdc(0, &atevklcd10x_lcdc_data, | ||
fbmem_start, fbmem_size, 1); | ||
return 0; | ||
} | ||
postcore_initcall(atevklcd10x_init); |
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# Favr-32 customization | ||
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if BOARD_FAVR_32 | ||
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config BOARD_FAVR32_ABDAC_RATE | ||
int "DAC target rate" | ||
default 44100 | ||
range 32000 50000 | ||
help | ||
Specify the target rate the internal DAC should try to match. This | ||
will use PLL1 to generate a frequency as close as possible to this | ||
rate. | ||
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Must be within the range 32000 to 50000, which should be suitable to | ||
generate most other frequencies in power of 2 steps. | ||
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Ex: | ||
48000 will also suit 24000 and 12000 | ||
44100 will also suit 22050 and 11025 | ||
32000 will also suit 16000 and 8000 | ||
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endif # BOARD_FAVR_32 |
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obj-y += setup.o flash.o |
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