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dt-bindings: arm: tegra: pmc: Move additionalProperties
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For indented subschemas it can be difficult to understand which block an
additionalProperties property belongs to. Moving it closer to the
beginning of a block is a good way to clarify this.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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thierryreding committed Oct 10, 2023
1 parent d330a68 commit 54a1951
Showing 1 changed file with 3 additions and 7 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -126,6 +126,7 @@ properties:
description: The vast majority of hardware blocks of Tegra SoC belong to a
core power domain, which has a dedicated voltage rail that powers the
blocks.
additionalProperties: false
properties:
operating-points-v2:
description: Should contain level, voltages and opp-supported-hw
Expand All @@ -139,12 +140,11 @@ properties:
- operating-points-v2
- "#power-domain-cells"

additionalProperties: false

i2c-thermtrip:
type: object
description: On Tegra30, Tegra114 and Tegra124 if i2c-thermtrip subnode
exists, hardware-triggered thermal reset will be enabled.
additionalProperties: false
properties:
nvidia,i2c-controller-id:
$ref: /schemas/types.yaml#/definitions/uint32
Expand Down Expand Up @@ -176,10 +176,9 @@ properties:
- nvidia,reg-addr
- nvidia,reg-data

additionalProperties: false

powergates:
type: object
additionalProperties: false
description: |
This node contains a hierarchy of power domain nodes, which should match
the powergates on the Tegra SoC. Each powergate node represents a power-
Expand Down Expand Up @@ -224,7 +223,6 @@ properties:
"^[a-z0-9]+$":
type: object
additionalProperties: false

properties:
clocks:
minItems: 1
Expand All @@ -246,8 +244,6 @@ properties:
- resets
- '#power-domain-cells'

additionalProperties: false

patternProperties:
"^[a-f0-9]+-[a-f0-9]+$":
type: object
Expand Down

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