SV2 Analyzer: Open-Source Large Language Model-Based Framework for Accelerating Digital Circuits Verification Flow

This repository contains the source code for:

M. Khaled, "SV2 Analyzer: Open-Source Large Language Model-Based Framework for Accelerating Digital Circuits Verification Flow," 2026 IEEE International Conference on Smart Sustainable Systems for Computer and Engineering Applications (3SCEA), Cairo, Egypt, 2026, pp. 374-379, doi: 10.1109/3SCEA68071.2026.11602718.

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Project is welcoming contributions that may include:

• Modifying the backend
• Fine-tuning the models
• Enriching the RAG Database