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Robert Jördens edited this page Oct 8, 2018 · 1 revision

Banker

The Banker EEM is being designed for high density digital I/O applications. It supports 128 TTL channels (5V or 3.3V LVTTL) available through two VHDCI connectors on the front panel and 8 IDC26 connectors inside the crate. It also features two downstream EEM connectors. Digital channel direction is selected in groups of 8 and the upstream EEM interface will be SPI in some incarnation.

The modular break-out boards from VHDCI to other formats (BNC, D-SUB 9, SMA) have been designed for a common DIN rail form factor and can be mounted in various formats from 19" racks to small boxes.

Final design, prototype fabrication, testing, gateware, ARTIQ coredevice interface, documentation, and continuous integration are waiting for sponsors.

Urukul

Both AD9910 internal waveform RAM and AD9910 deterministic synchronization among channels and with respect to the coredevice timebase are funded and being developed.

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