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Proof-of-concept emulator for the RISCV rv32im CPU architecture, written in Rust

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Name		Name	Last commit message	Last commit date
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.github		.github
doc		doc
programs		programs
src		src
tests		tests
.gitignore		.gitignore
Cargo.lock		Cargo.lock
Cargo.toml		Cargo.toml
LICENSE		LICENSE
README.md		README.md
compile_asm.py		compile_asm.py

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riscv-emulator

A small, proof-of-concept CPU emulator for the RISCV riscv32im architecture. The following features are included:

memory-mapped IO devices (framebuffer, debug output)
simple debugger support via attachable GDB
support for direct loading of ELF binaries

License

MIT

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Proof-of-concept emulator for the RISCV rv32im CPU architecture, written in Rust

emulator rust emulation riscv32

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