alocando paginas

Makefile

@@ -4,7 +4,7 @@ compile:
     boot.S trap.S mem.S main.cc uart.h mem.cc
 debug:
 	qemu-system-riscv64 -machine  virt -m 128M -serial mon:stdio -serial null  -nographic -gdb tcp::1234 -kernel kernel -S & \
-	xterm -e riscv64-unknown-elf-gdb \
+	xterm -e riscv64-unknown-elf-gdb --tui \
 	-ex "target remote:1234" -ex "set confirm off" \
 	-ex "add-symbol-file ./kernel 0x80000000"
 run:

main.cc

@@ -42,8 +42,8 @@ void add_timer(int seconds) {
 extern "C" int kmain()
 {
 
-	// Memory::init();
-	// Memory::alloc(3);	
+	Memory::init();
+	Memory::alloc(3);	
 
 	return 0;
 }

mem.cc

@@ -2,6 +2,18 @@
 
 using namespace Memory;
 
+
+//alinha o valor em relacao a ordem (4096)
+uint64_t Memory::align_val(unsigned int value, unsigned int order)
+{
+	uint64_t mask = -1 << order;
+	uint64_t operation = (1 << order) - 1;	
+	return (value + operation) & mask;
+}
+
+// descritores de pagina
+// seta todos os descritores de pagina, e seta o proximo endereco depois do endereco
+// do ultimo descritor de pagina
 void Memory::init()
 {
 
@@ -12,7 +24,7 @@ void Memory::init()
         (page+i)->clear();
     }
 
-    ALLOC_START = HEAP_START + num_pages * sizeof(Page);
+    ALLOC_START = align_val(HEAP_START + num_pages * sizeof(Page), PAGE_ORDER);
 
 }
 
@@ -21,13 +33,15 @@ bool Page::is_free(){
     return !this->is_taken();
 }
 bool Page::is_taken(){
-    return this->flags & PageInfo::TAKEN != 0;
+    return (this->flags & PageInfo::TAKEN ) != 0;
 }
 
 void Page::clear(){
     this->flags = PageInfo::EMPTY;
 }
 
+// queremos paginas continuas
+// not taken not taken not taken!!
 char* Memory::alloc(unsigned int pages)
 {
     int num_pages = HEAP_SIZE/PAGE_SIZE;
@@ -48,11 +62,14 @@ char* Memory::alloc(unsigned int pages)
 
         }
 
+				// se paginas contiguas foram encontradas
+				// retorna o endereco para alloc start 
+				// i é a descriçao de pagina
         if(found){
             for (int k =0; k < i+pages-1; k++){
                 (page+k)->flags |= (PageInfo::TAKEN);
-
             }
+
             (page+i+pages-1)->flags |=(PageInfo::TAKEN);
             (page+i+pages-1)->flags |=(PageInfo::LAST);
 
@@ -62,9 +79,10 @@ char* Memory::alloc(unsigned int pages)
     return nullptr;
 }
 
-void map(Table& root, unsigned int virt_addr, unsigned int phy_addr, uint64 bits, unsigned int level) 
+void map(Table& root, uint64_t virt_addr, uint64_t phy_addr, uint64_t bits, unsigned int level) 
 {
-    unsigned short vpn[] = {
+	// should lock
+    uint64_t vpn[] = {
         // VPN[0] = vaddr[20:12]
         (virt_addr >> 12) & 0x1ff,
         // VPN[1] = vaddr[29:21]
@@ -73,7 +91,7 @@ void map(Table& root, unsigned int virt_addr, unsigned int phy_addr, uint64 bits
         (virt_addr >> 30) & 0x1ff,
     };
 
-    unsigned short ppn[] = {
+    uint64_t ppn[] = {
         // PPN[0] = paddr[20:12]
         (phy_addr >> 12) & 0x1ff,
         // PPN[1] = paddr[29:21]
@@ -82,6 +100,9 @@ void map(Table& root, unsigned int virt_addr, unsigned int phy_addr, uint64 bits
         (phy_addr >> 30) & 0x3ffffff,
     };
 
+}
 
-
-}
+void unmap(Table& root)
+{
+
+}

mem.h

@@ -1,9 +1,14 @@
 #ifndef MEM_H
 #define MEM_H
 #include "uart.h"
-typedef unsigned long long uint64;
-
-static unsigned int ALLOC_START;
+typedef unsigned long long uint64_t;
+
+// saber onde está o proximo endereco para alocar
+static unsigned int ALLOC_START = 0;
+// para alinhar as paginas, tem que ser alinhado a 2^12
+// ou seja, 3 paginas = 3 ^12 e será multiplo de 4096 
+static const unsigned short PAGE_ORDER = 12;
+// cada pagina é do tamanho da leitura da MMU 
 static unsigned short PAGE_SIZE = 4096;
 
 extern "C" unsigned int HEAP_SIZE ;
@@ -16,7 +21,7 @@ extern "C" unsigned int BSS_START;
 extern "C" unsigned int BSS_END;
 extern "C" unsigned int KERNEL_STACK_START;
 extern "C" unsigned int KERNEL_STACK_END;
-extern "C" unsigned int HEAP_START;
+extern "C" uint64_t HEAP_START;
 extern "C" unsigned int HEAP_SIZE;
 
 namespace Memory{
@@ -28,14 +33,14 @@ enum EntryStatus {
 
 class Entry{
 public:
-	uint64 entry;
+	uint64_t entry;
 
-	bool is_valid(){return this->get_entry() & EntryStatus::VALID !=0;}
+	bool is_valid(){return (this->get_entry() & EntryStatus::VALID )!=0;}
 	bool is_invalid(){return !this->is_valid();}
-	bool is_leaf(){return this->get_entry() & 0xe != 0; }
+	bool is_leaf(){return (this->get_entry() & 0xe) != 0; }
 	bool is_branch(){return !this->is_leaf();}
-	void set_entry(uint64 entry){this->entry = entry;}
-	uint64 get_entry(){return this->entry;}
+	void set_entry(uint64_t entry){this->entry = entry;}
+	uint64_t get_entry(){return this->entry;}
 };
 
 struct Table{
@@ -69,10 +74,14 @@ char* alloc (unsigned int pages);
 void dealloc (unsigned int pages);
 char* zalloc (unsigned int pages);
 
-void map(Table& root, unsigned int virt_addr, unsigned int phy_addr, uint64 bits, unsigned int level );
+uint64_t align_val(unsigned int value, unsigned int order); 
+
+void map(Table& root, uint64_t virt_addr, uint64_t phy_addr, uint64_t bits, unsigned int level );
 void unmap(Table& root);
-uint64 virt_to_phys(Table& root, unsigned int virt_addr);
+uint64_t virt_to_phys(Table& root, unsigned int virt_addr);
+
+
 
 }
 
-#endif
+#endif

riscv64-virt.dts

@@ -0,0 +1,165 @@
+/dts-v1/;
+
+/ {
+	#address-cells = <0x02>;
+	#size-cells = <0x02>;
+	compatible = "riscv-virtio";
+	model = "riscv-virtio,qemu";
+
+	flash@20000000 {
+		bank-width = <0x04>;
+		reg = <0x00 0x20000000 0x00 0x2000000 0x00 0x22000000 0x00 0x2000000>;
+		compatible = "cfi-flash";
+	};
+
+	chosen {
+		bootargs = [00];
+		stdout-path = "/uart@10000000";
+	};
+
+	uart@10000000 {
+		interrupts = <0x0a>;
+		interrupt-parent = <0x03>;
+		clock-frequency = <0x384000>;
+		reg = <0x00 0x10000000 0x00 0x100>;
+		compatible = "ns16550a";
+	};
+
+	test@100000 {
+		reg = <0x00 0x100000 0x00 0x1000>;
+		compatible = "sifive,test1\0sifive,test0";
+	};
+
+	virtio_mmio@10008000 {
+		interrupts = <0x08>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10008000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10007000 {
+		interrupts = <0x07>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10007000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10006000 {
+		interrupts = <0x06>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10006000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10005000 {
+		interrupts = <0x05>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10005000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10004000 {
+		interrupts = <0x04>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10004000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10003000 {
+		interrupts = <0x03>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10003000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10002000 {
+		interrupts = <0x02>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10002000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	virtio_mmio@10001000 {
+		interrupts = <0x01>;
+		interrupt-parent = <0x03>;
+		reg = <0x00 0x10001000 0x00 0x1000>;
+		compatible = "virtio,mmio";
+	};
+
+	cpus {
+		#address-cells = <0x01>;
+		#size-cells = <0x00>;
+		timebase-frequency = <0x989680>;
+
+		cpu-map {
+
+			cluster0 {
+
+				core0 {
+					cpu = <0x01>;
+				};
+			};
+		};
+
+		cpu@0 {
+			phandle = <0x01>;
+			device_type = "cpu";
+			reg = <0x00>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcsu";
+			mmu-type = "riscv,sv48";
+
+			interrupt-controller {
+				#interrupt-cells = <0x01>;
+				interrupt-controller;
+				compatible = "riscv,cpu-intc";
+				phandle = <0x02>;
+			};
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x00 0x80000000 0x00 0x8000000>;
+	};
+
+	soc {
+		#address-cells = <0x02>;
+		#size-cells = <0x02>;
+		compatible = "simple-bus";
+		ranges;
+
+		pci@30000000 {
+			interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
+			interrupt-map = <0x00 0x00 0x00 0x01 0x03 0x20 0x00 0x00 0x00 0x02 0x03 0x21 0x00 0x00 0x00 0x03 0x03 0x22 0x00 0x00 0x00 0x04 0x03 0x23 0x800 0x00 0x00 0x01 0x03 0x21 0x800 0x00 0x00 0x02 0x03 0x22 0x800 0x00 0x00 0x03 0x03 0x23 0x800 0x00 0x00 0x04 0x03 0x20 0x1000 0x00 0x00 0x01 0x03 0x22 0x1000 0x00 0x00 0x02 0x03 0x23 0x1000 0x00 0x00 0x03 0x03 0x20 0x1000 0x00 0x00 0x04 0x03 0x21 0x1800 0x00 0x00 0x01 0x03 0x23 0x1800 0x00 0x00 0x02 0x03 0x20 0x1800 0x00 0x00 0x03 0x03 0x21 0x1800 0x00 0x00 0x04 0x03 0x22>;
+			ranges = <0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000>;
+			reg = <0x00 0x30000000 0x00 0x10000000>;
+			dma-coherent;
+			bus-range = <0x00 0xff>;
+			linux,pci-domain = <0x00>;
+			device_type = "pci";
+			compatible = "pci-host-ecam-generic";
+			#size-cells = <0x02>;
+			#interrupt-cells = <0x01>;
+			#address-cells = <0x03>;
+		};
+
+		interrupt-controller@c000000 {
+			phandle = <0x03>;
+			riscv,ndev = <0x35>;
+			reg = <0x00 0xc000000 0x00 0x4000000>;
+			interrupts-extended = <0x02 0x0b 0x02 0x09>;
+			interrupt-controller;
+			compatible = "riscv,plic0";
+			#interrupt-cells = <0x01>;
+			#address-cells = <0x00>;
+		};
+
+		clint@2000000 {
+			interrupts-extended = <0x02 0x03 0x02 0x07>;
+			reg = <0x00 0x2000000 0x00 0x10000>;
+			compatible = "riscv,clint0";
+		};
+	};
+};