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f805007
[𝘀𝗽𝗿] initial version
necipfazil Apr 3, 2024
2a17e59
Rebased on top of main
necipfazil Apr 24, 2024
a998707
dyn_cast to isa
necipfazil Apr 29, 2024
4a36a0c
Rebased on upstream main.
necipfazil May 1, 2024
851f62e
Rebase patchset
necipfazil Nov 14, 2024
460f02a
Update inline comment as suggested.
necipfazil Nov 14, 2024
1a8d810
Fixed the tests and addressed most of the review comments.
necipfazil Nov 19, 2024
4f31680
Rebase on top of upstream main. Remove opt has_value, value use.
necipfazil Nov 20, 2024
086baf0
Break clang and llvm parts into separate commits.
necipfazil Nov 20, 2024
5d09cf0
Address review comments. Break llvm and clang patches.
necipfazil Dec 10, 2024
f38ce99
Rebase on top of main.
necipfazil Feb 2, 2025
f80a182
Rename OB_type to OB_callee_type.
necipfazil Feb 5, 2025
fe1b3e2
Rebase on top of main
necipfazil Feb 11, 2025
80f879e
Update IR verifier.
necipfazil Feb 11, 2025
162e967
Add requested tests part 1.
necipfazil Mar 13, 2025
ddc8de5
Update comments in tests.
necipfazil Mar 13, 2025
5e97695
Remove unnecessary asserts. Remove autos for better readability.
necipfazil Mar 13, 2025
1429f1d
Add RISC-V support. Clean up test files.
necipfazil Mar 14, 2025
061fd55
Clean up test files.
necipfazil Mar 15, 2025
09a933d
Address code refactoring and test cleanup comments.
Prabhuk Mar 19, 2025
f1be618
Use metadata instead of OB to construct CallSiteInfo.
Prabhuk Apr 19, 2025
3eee130
Address review comments.
Prabhuk Apr 19, 2025
55ea3e2
Add tailcall tests.
Prabhuk Apr 23, 2025
4724c6e
Move verifier down to parent change.
Prabhuk Apr 23, 2025
f6a71b5
Address review comments.
Prabhuk Apr 23, 2025
a55c857
Address review comments.
Prabhuk Apr 24, 2025
5e5690a
Rebase on parent.
Prabhuk Apr 24, 2025
baaa763
Rebase on parent.
Prabhuk Apr 24, 2025
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29 changes: 29 additions & 0 deletions llvm/include/llvm/CodeGen/MachineFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,11 +26,14 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/IR/Instructions.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/ArrayRecycler.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MD5.h"
#include "llvm/Support/Recycler.h"
#include "llvm/Target/TargetOptions.h"
#include <bitset>
Expand Down Expand Up @@ -498,6 +501,32 @@ class LLVM_ABI MachineFunction {
SmallVector<ArgRegPair, 1> ArgRegPairs;
/// Callee type ids.
SmallVector<ConstantInt *, 4> CalleeTypeIds;

CallSiteInfo() = default;

/// Extracts the numeric type id from the CallBase's callee_type Metadata,
/// and sets CalleeTypeIds. This is used as type id for the indirect call in
/// the call graph section.
CallSiteInfo(const CallBase &CB) {
// Call graph section needs numeric callee_type id only for indirect
// calls.
if (!CB.isIndirectCall())
return;

MDNode *CalleeTypeList = CB.getMetadata(LLVMContext::MD_callee_type);
if (!CalleeTypeList)
return;

for (const MDOperand &Op : CalleeTypeList->operands()) {
MDNode *TypeMD = cast<MDNode>(Op);
MDString *TypeIdStr = cast<MDString>(TypeMD->getOperand(1));
// Compute numeric type id from generalized type id string
uint64_t TypeIdVal = MD5Hash(TypeIdStr->getString());
IntegerType *Int64Ty = Type::getInt64Ty(CB.getContext());
CalleeTypeIds.push_back(
ConstantInt::get(Int64Ty, TypeIdVal, /*IsSigned=*/false));
}
}
};

struct CalledGlobalInfo {
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -889,7 +889,8 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
}

if (MI->isCandidateForAdditionalCallInfo()) {
if (DAG->getTarget().Options.EmitCallSiteInfo)
if (DAG->getTarget().Options.EmitCallSiteInfo ||
DAG->getTarget().Options.EmitCallGraphSection)
MF.addCallSiteInfo(MI, DAG->getCallSiteInfo(Node));

if (auto CalledGlobal = DAG->getCalledGlobal(Node))
Expand Down
19 changes: 19 additions & 0 deletions llvm/lib/IR/Verifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -530,6 +530,7 @@ class Verifier : public InstVisitor<Verifier>, VerifierSupport {
void visitCallStackMetadata(MDNode *MD);
void visitMemProfMetadata(Instruction &I, MDNode *MD);
void visitCallsiteMetadata(Instruction &I, MDNode *MD);
void visitCalleeTypeMetadata(Instruction &I, MDNode *MD);
void visitDIAssignIDMetadata(Instruction &I, MDNode *MD);
void visitMMRAMetadata(Instruction &I, MDNode *MD);
void visitAnnotationMetadata(MDNode *Annotation);
Expand Down Expand Up @@ -5050,6 +5051,21 @@ void Verifier::visitCallsiteMetadata(Instruction &I, MDNode *MD) {
visitCallStackMetadata(MD);
}

void Verifier::visitCalleeTypeMetadata(Instruction &I, MDNode *MD) {
Check(isa<CallBase>(I), "!callee_type metadata should only exist on calls",
&I);
CallBase *CB = cast<CallBase>(&I);
Check(CB->isIndirectCall(),
"!callee_type metadata should only exist on indirect function calls",
&I);
for (const auto &Op : MD->operands()) {
auto *TypeMD = cast<MDNode>(Op.get());
MDString *TypeIdStr = cast<MDString>(TypeMD->getOperand(1));
Check(TypeIdStr->getString().ends_with(".generalized"),
"Invalid \"callee_type\" type identifier", &I);
}
}

void Verifier::visitAnnotationMetadata(MDNode *Annotation) {
Check(isa<MDTuple>(Annotation), "annotation must be a tuple");
Check(Annotation->getNumOperands() >= 1,
Expand Down Expand Up @@ -5325,6 +5341,9 @@ void Verifier::visitInstruction(Instruction &I) {
if (MDNode *MD = I.getMetadata(LLVMContext::MD_callsite))
visitCallsiteMetadata(I, MD);

if (MDNode *MD = I.getMetadata(LLVMContext::MD_callee_type))
visitCalleeTypeMetadata(I, MD);

if (MDNode *MD = I.getMetadata(LLVMContext::MD_DIAssignID))
visitDIAssignIDMetadata(I, MD);

Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8915,6 +8915,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
bool &IsTailCall = CLI.IsTailCall;
CallingConv::ID &CallConv = CLI.CallConv;
bool IsVarArg = CLI.IsVarArg;
const CallBase *CB = CLI.CB;

MachineFunction &MF = DAG.getMachineFunction();
MachineFunction::CallSiteInfo CSInfo;
Expand Down Expand Up @@ -8954,6 +8955,10 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
*DAG.getContext());
RetCCInfo.AnalyzeCallResult(Ins, RetCC);

// Set type id for call site info.
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
CSInfo = MachineFunction::CallSiteInfo(*CB);

// Check callee args/returns for SVE registers and set calling convention
// accordingly.
if (CallConv == CallingConv::C || CallConv == CallingConv::Fast) {
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2439,6 +2439,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
CallingConv::ID CallConv = CLI.CallConv;
bool doesNotRet = CLI.DoesNotReturn;
bool isVarArg = CLI.IsVarArg;
const CallBase *CB = CLI.CB;

MachineFunction &MF = DAG.getMachineFunction();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
Expand All @@ -2462,6 +2463,10 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
!Subtarget->noBTIAtReturnTwice())
GuardWithBTI = AFI->branchTargetEnforcement();

// Set type id for call site info.
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
CSInfo = MachineFunction::CallSiteInfo(*CB);

// Determine whether this is a non-secure function call.
if (CLI.CB && CLI.CB->getAttributes().hasFnAttr("cmse_nonsecure_call"))
isCmseNSCall = true;
Expand Down
6 changes: 5 additions & 1 deletion llvm/lib/Target/Mips/MipsISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3264,6 +3264,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
bool &IsTailCall = CLI.IsTailCall;
CallingConv::ID CallConv = CLI.CallConv;
bool IsVarArg = CLI.IsVarArg;
const CallBase *CB = CLI.CB;

MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo &MFI = MF.getFrameInfo();
Expand Down Expand Up @@ -3320,8 +3321,11 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Get a count of how many bytes are to be pushed on the stack.
unsigned StackSize = CCInfo.getStackSize();

// Call site info for function parameters tracking.
// Call site info for function parameters tracking and call base type info.
MachineFunction::CallSiteInfo CSInfo;
// Set type id for call site info.
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
CSInfo = MachineFunction::CallSiteInfo(*CB);

// Check if it's really possible to do a tail call. Restrict it to functions
// that are part of this compilation unit.
Expand Down
13 changes: 13 additions & 0 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20845,8 +20845,14 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
bool IsVarArg = CLI.IsVarArg;
EVT PtrVT = getPointerTy(DAG.getDataLayout());
MVT XLenVT = Subtarget.getXLenVT();
const CallBase *CB = CLI.CB;

MachineFunction &MF = DAG.getMachineFunction();
MachineFunction::CallSiteInfo CSInfo;

// Set type id for call site info.
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
CSInfo = MachineFunction::CallSiteInfo(*CB);

// Analyze the operands of the call, assigning locations to each operand.
SmallVector<CCValAssign, 16> ArgLocs;
Expand Down Expand Up @@ -21104,13 +21110,20 @@ SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
if (CLI.CFIType)
Ret.getNode()->setCFIType(CLI.CFIType->getZExtValue());
DAG.addNoMergeSiteInfo(Ret.getNode(), CLI.NoMerge);
if (MF.getTarget().Options.EmitCallGraphSection && CB &&
CB->isIndirectCall())
DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo));
return Ret;
}

unsigned CallOpc = NeedSWGuarded ? RISCVISD::SW_GUARDED_CALL : RISCVISD::CALL;
Chain = DAG.getNode(CallOpc, DL, NodeTys, Ops);
if (CLI.CFIType)
Chain.getNode()->setCFIType(CLI.CFIType->getZExtValue());

if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo));

DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge);
Glue = Chain.getValue(1);

Expand Down
8 changes: 8 additions & 0 deletions llvm/lib/Target/X86/X86FastISel.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3631,6 +3631,12 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
CLI.NumResultRegs = RVLocs.size();
CLI.Call = MIB;

// Add call site info for call graph section.
if (TM.Options.EmitCallGraphSection && CB && CB->isIndirectCall()) {
MachineFunction::CallSiteInfo CSInfo(*CB);
MF->addCallSiteInfo(CLI.Call, std::move(CSInfo));
}

return true;
}

Expand Down Expand Up @@ -4026,6 +4032,8 @@ bool X86FastISel::tryToFoldLoadIntoMI(MachineInstr *MI, unsigned OpNo,
MO.setReg(IndexReg);
}

if (MI->isCall())
FuncInfo.MF->moveAdditionalCallInfo(MI, Result);
Result->addMemOperand(*FuncInfo.MF, createMachineMemOperandFor(LI));
Result->cloneInstrSymbols(*FuncInfo.MF, *MI);
MachineBasicBlock::iterator I(MI);
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2031,6 +2031,10 @@ X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (CallConv == CallingConv::X86_INTR)
report_fatal_error("X86 interrupts may not be called directly");

// Set type id for call site info.
if (MF.getTarget().Options.EmitCallGraphSection && CB && CB->isIndirectCall())
CSInfo = MachineFunction::CallSiteInfo(*CB);

// Analyze operands of the call, assigning locations to each operand.
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());
Expand Down
19 changes: 19 additions & 0 deletions llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid-tailcall.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
;; Tests that call site callee type ids can be extracted and set from
;; callee_type metadata for indirect tail calls.

;; Verify the exact calleeTypeId value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck %s

define dso_local noundef i32 @_Z13call_indirectPFicEc(ptr noundef readonly captures(none) %func, i8 noundef signext %x) local_unnamed_addr !type !0 {
entry:
; CHECK: callSites:
; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], calleeTypeIds:
; CHECK-NEXT: [ 3498816979441845844 ] }
%call = tail call noundef i32 %func(i8 noundef signext %x), !callee_type !1
ret i32 %call
}

!0 = !{i64 0, !"_ZTSFiPvcE.generalized"}
!1 = !{!2}
!2 = !{i64 0, !"_ZTSFicE.generalized"}
27 changes: 27 additions & 0 deletions llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
;; Tests that call site callee type ids can be extracted and set from
;; callee_type metadata.

;; Verify the exact calleeTypeId value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
; RUN: llc --call-graph-section -mtriple aarch64-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck %s

declare !type !0 void @foo(i8 signext %a)

; CHECK: name: main
define dso_local i32 @main() !type !1 {
entry:
%retval = alloca i32, align 4
%fp = alloca ptr, align 8
store i32 0, ptr %retval, align 4
store ptr @foo, ptr %fp, align 8
%fp_val = load ptr, ptr %fp, align 8
; CHECK: callSites:
; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], calleeTypeIds:
; CHECK-NEXT: [ 7854600665770582568 ] }
call void %fp_val(i8 signext 97), !callee_type !2
ret i32 0
}

!0 = !{i64 0, !"_ZTSFvcE.generalized"}
!1 = !{i64 0, !"_ZTSFiE.generalized"}
!2 = !{!0}
19 changes: 19 additions & 0 deletions llvm/test/CodeGen/ARM/callsite-emit-calleetypeid-tailcall.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
;; Tests that call site callee type ids can be extracted and set from
;; callee_type metadata for indirect tail calls.

;; Verify the exact calleeTypeId value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
; RUN: llc --call-graph-section -mtriple arm-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck %s

define dso_local noundef i32 @_Z13call_indirectPFicEc(ptr noundef readonly captures(none) %func, i8 noundef signext %x) local_unnamed_addr !type !0 {
entry:
; CHECK: callSites:
; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], calleeTypeIds:
; CHECK-NEXT: [ 3498816979441845844 ] }
%call = tail call noundef i32 %func(i8 noundef signext %x), !callee_type !1
ret i32 %call
}

!0 = !{i64 0, !"_ZTSFiPvcE.generalized"}
!1 = !{!2}
!2 = !{i64 0, !"_ZTSFicE.generalized"}
27 changes: 27 additions & 0 deletions llvm/test/CodeGen/ARM/callsite-emit-calleetypeid.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
;; Tests that call site callee type ids can be extracted and set from
;; callee_type metadata.

;; Verify the exact calleeTypeId value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
; RUN: llc --call-graph-section -mtriple arm-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck %s

declare !type !0 void @foo(i8 signext %a)

; CHECK: name: main
define dso_local i32 @main() !type !1 {
entry:
%retval = alloca i32, align 4
%fp = alloca ptr, align 8
store i32 0, ptr %retval, align 4
store ptr @foo, ptr %fp, align 8
%fp_val = load ptr, ptr %fp, align 8
; CHECK: callSites:
; CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], calleeTypeIds:
; CHECK-NEXT: [ 7854600665770582568 ] }
call void %fp_val(i8 signext 97), !callee_type !2
ret i32 0
}

!0 = !{i64 0, !"_ZTSFvcE.generalized"}
!1 = !{i64 0, !"_ZTSFiE.generalized"}
!2 = !{!0}
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