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[RISCV] Support isel for Zacas for XLen and i32. #77666

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Merged
merged 1 commit into from
Jan 10, 2024
Merged

[RISCV] Support isel for Zacas for XLen and i32. #77666

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1 change: 1 addition & 0 deletions llvm/lib/Target/RISCV/RISCVFeatures.td
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Original file line number Diff line number Diff line change
Expand Up @@ -736,6 +736,7 @@ def FeatureStdExtZacas
def HasStdExtZacas : Predicate<"Subtarget->hasStdExtZacas()">,
AssemblerPredicate<(all_of FeatureStdExtZacas),
"'Zacas' (Atomic Compare-And-Swap Instructions)">;
def NoStdExtZacas : Predicate<"!Subtarget->hasStdExtZacas()">;

//===----------------------------------------------------------------------===//
// Vendor extensions
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14 changes: 8 additions & 6 deletions llvm/lib/Target/RISCV/RISCVInstrInfoA.td
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Expand Up @@ -333,11 +333,17 @@ multiclass PseudoCmpXchgPat<string Op, Pseudo CmpXchgInst,
(CmpXchgInst GPR:$addr, GPR:$cmp, GPR:$new, 7)>;
}

let Predicates = [HasStdExtA] in {

let Predicates = [HasStdExtA, NoStdExtZacas] in {
def PseudoCmpXchg32 : PseudoCmpXchg;
defm : PseudoCmpXchgPat<"atomic_cmp_swap_32", PseudoCmpXchg32>;
}

let Predicates = [HasStdExtA, NoStdExtZacas, IsRV64] in {
def PseudoCmpXchg64 : PseudoCmpXchg;
defm : PseudoCmpXchgPat<"atomic_cmp_swap_64", PseudoCmpXchg64, i64>;
}

let Predicates = [HasStdExtA] in {
def PseudoMaskedCmpXchg32
: Pseudo<(outs GPR:$res, GPR:$scratch),
(ins GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask,
Expand All @@ -356,10 +362,6 @@ def : Pat<(int_riscv_masked_cmpxchg_i32
} // Predicates = [HasStdExtA]

let Predicates = [HasStdExtA, IsRV64] in {

def PseudoCmpXchg64 : PseudoCmpXchg;
defm : PseudoCmpXchgPat<"atomic_cmp_swap_64", PseudoCmpXchg64, i64>;

def : Pat<(int_riscv_masked_cmpxchg_i64
GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering),
(PseudoMaskedCmpXchg32
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51 changes: 51 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
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Expand Up @@ -67,6 +67,57 @@ defm AMOCAS_D_RV64 : AMO_cas_aq_rl<0b00101, 0b011, "amocas.d", GPR>;
defm AMOCAS_Q : AMO_cas_aq_rl<0b00101, 0b100, "amocas.q", GPRPairRV64>;
} // Predicates = [HasStdExtZacas, IsRV64]

multiclass AMOCASPat<string AtomicOp, string BaseInst, ValueType vt = XLenVT,
list<Predicate> ExtraPreds = []> {
let Predicates = !listconcat([HasStdExtZacas, NotHasStdExtZtso], ExtraPreds) in {
def : Pat<(!cast<PatFrag>(AtomicOp#"_monotonic") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_acquire") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst#"_AQ") GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_release") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst#"_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_acq_rel") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_seq_cst") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst#"_AQ_RL") GPR:$cmp, GPR:$addr, GPR:$new)>;
} // Predicates = !listconcat([HasStdExtZacas, NotHasStdExtZtso], ExtraPreds)
let Predicates = !listconcat([HasStdExtZacas, HasStdExtZtso], ExtraPreds) in {
def : Pat<(!cast<PatFrag>(AtomicOp#"_monotonic") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_acquire") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_release") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_acq_rel") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
def : Pat<(!cast<PatFrag>(AtomicOp#"_seq_cst") (vt GPR:$addr),
(vt GPR:$cmp),
(vt GPR:$new)),
(!cast<RVInst>(BaseInst) GPR:$cmp, GPR:$addr, GPR:$new)>;
} // Predicates = !listconcat([HasStdExtZacas, HasStdExtZtso], ExtraPreds)
}

defm : AMOCASPat<"atomic_cmp_swap_32", "AMOCAS_W">;
defm : AMOCASPat<"atomic_cmp_swap_64", "AMOCAS_D_RV64", i64, [IsRV64]>;

//===----------------------------------------------------------------------===//
// Zawrs (Wait-on-Reservation-Set)
//===----------------------------------------------------------------------===//
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