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[AMDGPU] Fix HasFP32Denormals check in FDIV32 lowering #66212

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Merged
merged 1 commit into from
Sep 14, 2023
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[AMDGPU] Fix HasFP32Denormals check in FDIV32 lowering #66212

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4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4725,7 +4725,7 @@ bool AMDGPULegalizerInfo::legalizeFDIV32(MachineInstr &MI,

// FIXME: Doesn't correctly model the FP mode switch, and the FP operations
// aren't modeled as reading it.
if (Mode.FP32Denormals != DenormalMode::getIEEE())
if (Mode.FP32Denormals == DenormalMode::getPreserveSign())
toggleSPDenormMode(true, B, ST, Mode);

auto Fma0 = B.buildFMA(S32, NegDivScale0, ApproxRcp, One, Flags);
Expand All @@ -4737,7 +4737,7 @@ bool AMDGPULegalizerInfo::legalizeFDIV32(MachineInstr &MI,

// FIXME: This mishandles dynamic denormal mode. We need to query the
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This is still broken, we're just changing the mode incorrectly in the other direction

// current mode and restore the original.
if (Mode.FP32Denormals != DenormalMode::getIEEE())
if (Mode.FP32Denormals == DenormalMode::getPreserveSign())
toggleSPDenormMode(false, B, ST, Mode);

auto Fmas = B.buildIntrinsic(Intrinsic::amdgcn_div_fmas, {S32})
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Expand Up @@ -9589,7 +9589,7 @@ SDValue SITargetLowering::LowerFDIV32(SDValue Op, SelectionDAG &DAG) const {
const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
const DenormalMode DenormMode = Info->getMode().FP32Denormals;

const bool HasFP32Denormals = DenormMode == DenormalMode::getIEEE();
const bool HasFP32Denormals = DenormMode != DenormalMode::getPreserveSign();

if (!HasFP32Denormals) {
// Note we can't use the STRICT_FMA/STRICT_FMUL for the non-strict FDIV
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