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[RISCV] Fix corner cases after #170070 #170438

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Merged
wangpc-pp merged 6 commits into from
Dec 3, 2025
Merged

[RISCV] Fix corner cases after #170070 #170438

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973ccca
[RISCV] Add precommit test that copy is killed
wangpc-pp Dec 3, 2025
38ad8f6
[RISCV] Clear kill flags for FalseReg in foldVMergeToMask
wangpc-pp Dec 3, 2025
6005bae
Add precommit test for multiple use
wangpc-pp Dec 3, 2025
1f216ed
look through COPYs with one non-debug use
wangpc-pp Dec 3, 2025
4070453
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wangpc-pp Dec 3, 2025
3b5e103
update test
wangpc-pp Dec 3, 2025
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12 changes: 9 additions & 3 deletions llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ class RISCVVectorPeephole : public MachineFunctionPass {
bool isAllOnesMask(const MachineInstr *MaskDef) const;
std::optional<unsigned> getConstant(const MachineOperand &VL) const;
bool ensureDominates(const MachineOperand &Use, MachineInstr &Src) const;
Register lookThruCopies(Register Reg) const;
Register lookThruCopies(Register Reg, bool OneUseOnly = false) const;
};

} // namespace
Expand Down Expand Up @@ -389,13 +389,16 @@ bool RISCVVectorPeephole::convertAllOnesVMergeToVMv(MachineInstr &MI) const {

// If \p Reg is defined by one or more COPYs of virtual registers, traverses
// the chain and returns the root non-COPY source.
Register RISCVVectorPeephole::lookThruCopies(Register Reg) const {
Register RISCVVectorPeephole::lookThruCopies(Register Reg,
bool OneUseOnly) const {
while (MachineInstr *Def = MRI->getUniqueVRegDef(Reg)) {
if (!Def->isFullCopy())
break;
Register Src = Def->getOperand(1).getReg();
if (!Src.isVirtual())
break;
if (OneUseOnly && !MRI->hasOneNonDBGUse(Reg))
break;
Reg = Src;
}
return Reg;
Expand Down Expand Up @@ -715,7 +718,8 @@ bool RISCVVectorPeephole::foldVMergeToMask(MachineInstr &MI) const {

Register PassthruReg = lookThruCopies(MI.getOperand(1).getReg());
Register FalseReg = lookThruCopies(MI.getOperand(2).getReg());
Register TrueReg = lookThruCopies(MI.getOperand(3).getReg());
Register TrueReg =
lookThruCopies(MI.getOperand(3).getReg(), /*OneUseOnly=*/true);
if (!TrueReg.isVirtual() || !MRI->hasOneUse(TrueReg))
return false;
MachineInstr &True = *MRI->getUniqueVRegDef(TrueReg);
Expand Down Expand Up @@ -834,6 +838,8 @@ bool RISCVVectorPeephole::foldVMergeToMask(MachineInstr &MI) const {
MRI->constrainRegClass(
MO.getReg(), True.getRegClassConstraint(MO.getOperandNo(), TII, TRI));
}
// We should clear the IsKill flag since we have an use now.
MRI->clearKillFlags(FalseReg);
MI.eraseFromParent();

return true;
Expand Down
48 changes: 48 additions & 0 deletions llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -136,3 +136,51 @@ body: |
%y:vrnov0 = COPY %x
%z:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %y, %mask, %avl, 5 /* e32 */
...
---
name: copy_is_killed
body: |
bb.0:
liveins: $v0, $v8, $v9
; CHECK-LABEL: name: copy_is_killed
; CHECK: liveins: $v0, $v8, $v9
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:vr = COPY $v8
; CHECK-NEXT: %y:vr = COPY $v9
; CHECK-NEXT: %mask:vmv0 = COPY $v0
; CHECK-NEXT: %add0:vr = PseudoVADD_VV_M1 $noreg, %x, %y, -1, 5 /* e32 */, 3 /* ta, ma */
; CHECK-NEXT: %add1:vrnov0 = COPY %add:vrnov0
; CHECK-NEXT: %merge:vrnov0 = PseudoVOR_VV_M1_MASK %add:vrnov0, %add1, %y, %mask, -1, 5 /* e32 */, 1 /* ta, mu */
; CHECK-NEXT: $v8 = COPY %merge
; CHECK-NEXT: PseudoRET implicit $v8
%x:vr = COPY $v8
%y:vr = COPY $v9
%mask:vmv0 = COPY $v0
%add0:vr = PseudoVADD_VV_M1 $noreg, %x:vr, %y:vr, -1, 5, 3
%add1:vrnov0 = COPY killed %add:vr
%or:vrnov0 = PseudoVOR_VV_M1 $noreg, %add1:vrnov0, %y:vr, -1, 5, 3
%merge:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %add1:vrnov0, killed %or:vrnov0, killed %mask:vmv0, -1, 5 /* e32 */
$v8 = COPY %merge:vrnov0
PseudoRET implicit $v8
...
---
name: copy_multiple_use
body: |
bb.0:
liveins: $x8, $v0, $v8
; CHECK-LABEL: name: copy_multiple_use
; CHECK: liveins: $x8, $v0, $v8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %avl:gprnox0 = COPY $x8
; CHECK-NEXT: %passthru:vrnov0 = COPY $v8
; CHECK-NEXT: %x:vrnov0 = PseudoVLE32_V_M1 $noreg, $noreg, %avl, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size, align 1)
; CHECK-NEXT: %copy:vrnov0 = COPY %x
; CHECK-NEXT: %mask:vmv0 = COPY $v0
; CHECK-NEXT: PseudoVSE8_V_M1 %copy, $noreg, %avl, 5 /* e32 */
; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %copy, %mask, %avl, 5 /* e32 */
%avl:gprnox0 = COPY $x8
%passthru:vrnov0 = COPY $v8
%x:vrnov0 = PseudoVLE32_V_M1 $noreg, $noreg, %avl, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size)
%copy:vrnov0 = COPY %x
%mask:vmv0 = COPY $v0
PseudoVSE8_V_M1 %copy, $noreg, %avl, 5 /* e8 */
%y:vrnov0 = PseudoVMERGE_VVM_M1 %passthru, %passthru, %copy, %mask, %avl, 5 /* e32 */