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[RISCV] Correct the immediate swizzling for P-ext plui.h/w. #149945

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Merged
merged 3 commits into from
Jul 22, 2025
Merged

[RISCV] Correct the immediate swizzling for P-ext plui.h/w. #149945

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5f623b4
[RISCV] Don't use RVInstIBase for P-ext plui/pli. NFC
topperc Jul 21, 2025
e7797b9
[RISCV] Correct the immediate swizzling for P-ext plui.h/w.
topperc Jul 21, 2025
a6d4f4e
Merge remote-tracking branch 'origin/main' into pr/plui
topperc Jul 22, 2025
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32 changes: 23 additions & 9 deletions llvm/lib/Target/RISCV/RISCVInstrInfoP.td
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Original file line number Diff line number Diff line change
Expand Up @@ -44,9 +44,8 @@ def simm10_unsigned : RISCVOp {
//===----------------------------------------------------------------------===//

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
class RVPLoadImm10<bits<7> funct7, string opcodestr,
DAGOperand TyImm10 = simm10>
: RVInst<(outs GPR:$rd), (ins TyImm10:$imm10), opcodestr, "$rd, $imm10", [],
class PLI_i<bits<7> funct7, string opcodestr>
: RVInst<(outs GPR:$rd), (ins simm10:$imm10), opcodestr, "$rd, $imm10", [],
InstFormatOther> {
bits<10> imm10;
bits<5> rd;
Expand All @@ -60,7 +59,22 @@ class RVPLoadImm10<bits<7> funct7, string opcodestr,
}

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
class RVPLoadImm8<bits<8> funct8, string opcodestr>
class PLUI_i<bits<7> funct7, string opcodestr>
: RVInst<(outs GPR:$rd), (ins simm10_unsigned:$imm10), opcodestr,
"$rd, $imm10", [], InstFormatOther> {
bits<10> imm10;
bits<5> rd;

let Inst{31-25} = funct7;
let Inst{24} = imm10{0};
let Inst{23-15} = imm10{9-1};
let Inst{14-12} = 0b010;
let Inst{11-7} = rd;
let Inst{6-0} = OPC_OP_IMM_32.Value;
}

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
class PLI_B_i<bits<8> funct8, string opcodestr>
: RVInst<(outs GPR:$rd), (ins uimm8:$uimm8), opcodestr, "$rd, $uimm8", [],
InstFormatOther> {
bits<8> uimm8;
Expand Down Expand Up @@ -148,11 +162,11 @@ def PSSLAI_W : RVPUnaryImm5<0b101, "psslai.w">;
} // Predicates = [HasStdExtP, IsRV64]

let Predicates = [HasStdExtP] in
def PLI_H : RVPLoadImm10<0b1011000, "pli.h">;
def PLI_H : PLI_i<0b1011000, "pli.h">;
let Predicates = [HasStdExtP, IsRV64] in
def PLI_W : RVPLoadImm10<0b1011001, "pli.w">;
def PLI_W : PLI_i<0b1011001, "pli.w">;
let Predicates = [HasStdExtP] in
def PLI_B : RVPLoadImm8<0b10110100, "pli.b">;
def PLI_B : PLI_B_i<0b10110100, "pli.b">;

let Predicates = [HasStdExtP] in {
def PSEXT_H_B : RVPUnaryWUF<0b00, 0b00100, "psext.h.b">;
Expand All @@ -165,6 +179,6 @@ def PSEXT_W_H : RVPUnaryWUF<0b01, 0b00101, "psext.w.h">;
} // Predicates = [HasStdExtP, IsRV64]

let Predicates = [HasStdExtP] in
def PLUI_H : RVPLoadImm10<0b1111000, "plui.h", simm10_unsigned>;
def PLUI_H : PLUI_i<0b1111000, "plui.h">;
let Predicates = [HasStdExtP, IsRV64] in
def PLUI_W : RVPLoadImm10<0b1111001, "plui.w", simm10_unsigned>;
def PLUI_W : PLUI_i<0b1111001, "plui.w">;
4 changes: 2 additions & 2 deletions llvm/test/MC/RISCV/rv32p-valid.s
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Original file line number Diff line number Diff line change
Expand Up @@ -71,8 +71,8 @@ psabs.h a1, a2
# CHECK-ASM: encoding: [0x9b,0x22,0x73,0xe4]
psabs.b t0, t1
# CHECK-ASM-AND-OBJ: plui.h gp, 32
# CHECK-ASM: encoding: [0x9b,0x21,0x20,0xf0]
# CHECK-ASM: encoding: [0x9b,0x21,0x08,0xf0]
plui.h gp, 32
# CHECK-ASM-AND-OBJ: plui.h gp, -412
# CHECK-ASM: encoding: [0x9b,0xa1,0x64,0xf0]
# CHECK-ASM: encoding: [0x9b,0x21,0x99,0xf0]
plui.h gp, 612
6 changes: 3 additions & 3 deletions llvm/test/MC/RISCV/rv64p-valid.s
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Expand Up @@ -95,13 +95,13 @@ psabs.h t1, t5
# CHECK-ASM: encoding: [0x1b,0x25,0x79,0xe4]
psabs.b a0, s2
# CHECK-ASM-AND-OBJ: plui.h s2, 4
# CHECK-ASM: encoding: [0x1b,0x29,0x04,0xf0]
# CHECK-ASM: encoding: [0x1b,0x29,0x01,0xf0]
plui.h s2, 4
# CHECK-ASM-AND-OBJ: plui.h gp, -412
# CHECK-ASM: encoding: [0x9b,0xa1,0x64,0xf0]
# CHECK-ASM: encoding: [0x9b,0x21,0x99,0xf0]
plui.h gp, 612
# CHECK-ASM-AND-OBJ: plui.w a2, 1
# CHECK-ASM: encoding: [0x1b,0x26,0x01,0xf2]
# CHECK-ASM: encoding: [0x1b,0x26,0x00,0xf3]
plui.w a2, 1
# CHECK-ASM-AND-OBJ: plui.w a2, -1
# CHECK-ASM: encoding: [0x1b,0xa6,0xff,0xf3]
Expand Down