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58 changes: 29 additions & 29 deletions mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -340,15 +340,15 @@ LogicalResult ForLowering::matchAndRewrite(ForOp forOp,
Operation *terminator = lastBodyBlock->getTerminator();
rewriter.setInsertionPointToEnd(lastBodyBlock);
auto step = forOp.getStep();
auto stepped = rewriter.create<arith::AddIOp>(loc, iv, step).getResult();
auto stepped = arith::AddIOp::create(rewriter, loc, iv, step).getResult();
if (!stepped)
return failure();

SmallVector<Value, 8> loopCarried;
loopCarried.push_back(stepped);
loopCarried.append(terminator->operand_begin(), terminator->operand_end());
auto branchOp =
rewriter.create<cf::BranchOp>(loc, conditionBlock, loopCarried);
cf::BranchOp::create(rewriter, loc, conditionBlock, loopCarried);

// Let the CondBranchOp carry the LLVM attributes from the ForOp, such as the
// llvm.loop_annotation attribute.
Expand All @@ -375,16 +375,15 @@ LogicalResult ForLowering::matchAndRewrite(ForOp forOp,
SmallVector<Value, 8> destOperands;
destOperands.push_back(lowerBound);
llvm::append_range(destOperands, forOp.getInitArgs());
rewriter.create<cf::BranchOp>(loc, conditionBlock, destOperands);
cf::BranchOp::create(rewriter, loc, conditionBlock, destOperands);

// With the body block done, we can fill in the condition block.
rewriter.setInsertionPointToEnd(conditionBlock);
auto comparison = rewriter.create<arith::CmpIOp>(
loc, arith::CmpIPredicate::slt, iv, upperBound);
auto comparison = arith::CmpIOp::create(
rewriter, loc, arith::CmpIPredicate::slt, iv, upperBound);

rewriter.create<cf::CondBranchOp>(loc, comparison, firstBodyBlock,
ArrayRef<Value>(), endBlock,
ArrayRef<Value>());
cf::CondBranchOp::create(rewriter, loc, comparison, firstBodyBlock,
ArrayRef<Value>(), endBlock, ArrayRef<Value>());

// The result of the loop operation is the values of the condition block
// arguments except the induction variable on the last iteration.
Expand All @@ -409,7 +408,7 @@ LogicalResult IfLowering::matchAndRewrite(IfOp ifOp,
continueBlock =
rewriter.createBlock(remainingOpsBlock, ifOp.getResultTypes(),
SmallVector<Location>(ifOp.getNumResults(), loc));
rewriter.create<cf::BranchOp>(loc, remainingOpsBlock);
cf::BranchOp::create(rewriter, loc, remainingOpsBlock);
}

// Move blocks from the "then" region to the region containing 'scf.if',
Expand All @@ -419,7 +418,7 @@ LogicalResult IfLowering::matchAndRewrite(IfOp ifOp,
Operation *thenTerminator = thenRegion.back().getTerminator();
ValueRange thenTerminatorOperands = thenTerminator->getOperands();
rewriter.setInsertionPointToEnd(&thenRegion.back());
rewriter.create<cf::BranchOp>(loc, continueBlock, thenTerminatorOperands);
cf::BranchOp::create(rewriter, loc, continueBlock, thenTerminatorOperands);
rewriter.eraseOp(thenTerminator);
rewriter.inlineRegionBefore(thenRegion, continueBlock);

Expand All @@ -433,15 +432,15 @@ LogicalResult IfLowering::matchAndRewrite(IfOp ifOp,
Operation *elseTerminator = elseRegion.back().getTerminator();
ValueRange elseTerminatorOperands = elseTerminator->getOperands();
rewriter.setInsertionPointToEnd(&elseRegion.back());
rewriter.create<cf::BranchOp>(loc, continueBlock, elseTerminatorOperands);
cf::BranchOp::create(rewriter, loc, continueBlock, elseTerminatorOperands);
rewriter.eraseOp(elseTerminator);
rewriter.inlineRegionBefore(elseRegion, continueBlock);
}

rewriter.setInsertionPointToEnd(condBlock);
rewriter.create<cf::CondBranchOp>(loc, ifOp.getCondition(), thenBlock,
/*trueArgs=*/ArrayRef<Value>(), elseBlock,
/*falseArgs=*/ArrayRef<Value>());
cf::CondBranchOp::create(rewriter, loc, ifOp.getCondition(), thenBlock,
/*trueArgs=*/ArrayRef<Value>(), elseBlock,
/*falseArgs=*/ArrayRef<Value>());

// Ok, we're done!
rewriter.replaceOp(ifOp, continueBlock->getArguments());
Expand All @@ -459,13 +458,14 @@ ExecuteRegionLowering::matchAndRewrite(ExecuteRegionOp op,

auto &region = op.getRegion();
rewriter.setInsertionPointToEnd(condBlock);
rewriter.create<cf::BranchOp>(loc, &region.front());
cf::BranchOp::create(rewriter, loc, &region.front());

for (Block &block : region) {
if (auto terminator = dyn_cast<scf::YieldOp>(block.getTerminator())) {
ValueRange terminatorOperands = terminator->getOperands();
rewriter.setInsertionPointToEnd(&block);
rewriter.create<cf::BranchOp>(loc, remainingOpsBlock, terminatorOperands);
cf::BranchOp::create(rewriter, loc, remainingOpsBlock,
terminatorOperands);
rewriter.eraseOp(terminator);
}
}
Expand Down Expand Up @@ -503,7 +503,7 @@ ParallelLowering::matchAndRewrite(ParallelOp parallelOp,
for (auto [iv, lower, upper, step] :
llvm::zip(parallelOp.getInductionVars(), parallelOp.getLowerBound(),
parallelOp.getUpperBound(), parallelOp.getStep())) {
ForOp forOp = rewriter.create<ForOp>(loc, lower, upper, step, iterArgs);
ForOp forOp = ForOp::create(rewriter, loc, lower, upper, step, iterArgs);
ivs.push_back(forOp.getInductionVar());
auto iterRange = forOp.getRegionIterArgs();
iterArgs.assign(iterRange.begin(), iterRange.end());
Expand All @@ -517,7 +517,7 @@ ParallelLowering::matchAndRewrite(ParallelOp parallelOp,
// A loop is constructed with an empty "yield" terminator if there are
// no results.
rewriter.setInsertionPointToEnd(rewriter.getInsertionBlock());
rewriter.create<scf::YieldOp>(loc, forOp.getResults());
scf::YieldOp::create(rewriter, loc, forOp.getResults());
}

rewriter.setInsertionPointToStart(forOp.getBody());
Expand Down Expand Up @@ -549,7 +549,7 @@ ParallelLowering::matchAndRewrite(ParallelOp parallelOp,
// has been already created in loop construction).
if (!yieldOperands.empty()) {
rewriter.setInsertionPointToEnd(rewriter.getInsertionBlock());
rewriter.create<scf::YieldOp>(loc, yieldOperands);
scf::YieldOp::create(rewriter, loc, yieldOperands);
}

rewriter.replaceOp(parallelOp, loopResults);
Expand All @@ -575,7 +575,7 @@ LogicalResult WhileLowering::matchAndRewrite(WhileOp whileOp,

// Branch to the "before" region.
rewriter.setInsertionPointToEnd(currentBlock);
rewriter.create<cf::BranchOp>(loc, before, whileOp.getInits());
cf::BranchOp::create(rewriter, loc, before, whileOp.getInits());

// Replace terminators with branches. Assuming bodies are SESE, which holds
// given only the patterns from this file, we only need to look at the last
Expand Down Expand Up @@ -625,14 +625,14 @@ DoWhileLowering::matchAndRewrite(WhileOp whileOp,

// Branch to the "before" region.
rewriter.setInsertionPointToEnd(currentBlock);
rewriter.create<cf::BranchOp>(whileOp.getLoc(), before, whileOp.getInits());
cf::BranchOp::create(rewriter, whileOp.getLoc(), before, whileOp.getInits());

// Loop around the "before" region based on condition.
rewriter.setInsertionPointToEnd(before);
auto condOp = cast<ConditionOp>(before->getTerminator());
rewriter.create<cf::CondBranchOp>(condOp.getLoc(), condOp.getCondition(),
before, condOp.getArgs(), continuation,
ValueRange());
cf::CondBranchOp::create(rewriter, condOp.getLoc(), condOp.getCondition(),
before, condOp.getArgs(), continuation,
ValueRange());

// Replace the op with values "yielded" from the "before" region, which are
// visible by dominance.
Expand Down Expand Up @@ -695,12 +695,12 @@ IndexSwitchLowering::matchAndRewrite(IndexSwitchOp op,
SmallVector<ValueRange> caseOperands(caseSuccessors.size(), {});

// Cast switch index to integer case value.
Value caseValue = rewriter.create<arith::IndexCastOp>(
op.getLoc(), rewriter.getI32Type(), op.getArg());
Value caseValue = arith::IndexCastOp::create(
rewriter, op.getLoc(), rewriter.getI32Type(), op.getArg());

rewriter.create<cf::SwitchOp>(
op.getLoc(), caseValue, *defaultBlock, ValueRange(),
rewriter.getDenseI32ArrayAttr(caseValues), caseSuccessors, caseOperands);
cf::SwitchOp::create(rewriter, op.getLoc(), caseValue, *defaultBlock,
ValueRange(), rewriter.getDenseI32ArrayAttr(caseValues),
caseSuccessors, caseOperands);
rewriter.replaceOp(op, continueBlock->getArguments());
return success();
}
Expand Down
20 changes: 11 additions & 9 deletions mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -91,7 +91,7 @@ createVariablesForResults(T op, const TypeConverter *typeConverter,
Type varType = emitc::LValueType::get(resultType);
emitc::OpaqueAttr noInit = emitc::OpaqueAttr::get(context, "");
emitc::VariableOp var =
rewriter.create<emitc::VariableOp>(loc, varType, noInit);
emitc::VariableOp::create(rewriter, loc, varType, noInit);
resultVariables.push_back(var);
}

Expand All @@ -103,14 +103,14 @@ createVariablesForResults(T op, const TypeConverter *typeConverter,
static void assignValues(ValueRange values, ValueRange variables,
ConversionPatternRewriter &rewriter, Location loc) {
for (auto [value, var] : llvm::zip(values, variables))
rewriter.create<emitc::AssignOp>(loc, var, value);
emitc::AssignOp::create(rewriter, loc, var, value);
}

SmallVector<Value> loadValues(const SmallVector<Value> &variables,
PatternRewriter &rewriter, Location loc) {
return llvm::map_to_vector<>(variables, [&](Value var) {
Type type = cast<emitc::LValueType>(var.getType()).getValueType();
return rewriter.create<emitc::LoadOp>(loc, type, var).getResult();
return emitc::LoadOp::create(rewriter, loc, type, var).getResult();
});
}

Expand All @@ -129,7 +129,7 @@ static LogicalResult lowerYield(Operation *op, ValueRange resultVariables,

assignValues(yieldOperands, resultVariables, rewriter, loc);

rewriter.create<emitc::YieldOp>(loc);
emitc::YieldOp::create(rewriter, loc);
rewriter.eraseOp(yield);

return success();
Expand Down Expand Up @@ -164,8 +164,9 @@ ForLowering::matchAndRewrite(ForOp forOp, OpAdaptor adaptor,

assignValues(adaptor.getInitArgs(), resultVariables, rewriter, loc);

emitc::ForOp loweredFor = rewriter.create<emitc::ForOp>(
loc, adaptor.getLowerBound(), adaptor.getUpperBound(), adaptor.getStep());
emitc::ForOp loweredFor =
emitc::ForOp::create(rewriter, loc, adaptor.getLowerBound(),
adaptor.getUpperBound(), adaptor.getStep());

Block *loweredBody = loweredFor.getBody();

Expand Down Expand Up @@ -257,7 +258,7 @@ IfLowering::matchAndRewrite(IfOp ifOp, OpAdaptor adaptor,
bool hasElseBlock = !elseRegion.empty();

auto loweredIf =
rewriter.create<emitc::IfOp>(loc, adaptor.getCondition(), false, false);
emitc::IfOp::create(rewriter, loc, adaptor.getCondition(), false, false);

Region &loweredThenRegion = loweredIf.getThenRegion();
auto result = lowerRegion(thenRegion, loweredThenRegion);
Expand Down Expand Up @@ -304,8 +305,9 @@ LogicalResult IndexSwitchOpLowering::matchAndRewrite(
"create variables for results failed");
}

auto loweredSwitch = rewriter.create<emitc::SwitchOp>(
loc, adaptor.getArg(), adaptor.getCases(), indexSwitchOp.getNumCases());
auto loweredSwitch =
emitc::SwitchOp::create(rewriter, loc, adaptor.getArg(),
adaptor.getCases(), indexSwitchOp.getNumCases());

// Lowering all case regions.
for (auto pair :
Expand Down
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