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AlwaysInliner: A new inlining algorithm to interleave alloca promotion with inlines. #145613

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c904c18
[𝘀𝗽𝗿] initial version
aemerson Jun 24, 2025
fdef6e7
clang-format
aemerson Jun 25, 2025
e131d4d
Add nullptr check and fix tests.
aemerson Jun 26, 2025
7d45d06
Rebase on pre-committed phase ordering test.
aemerson Jul 3, 2025
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460 changes: 230 additions & 230 deletions clang/test/CodeGen/PowerPC/builtins-ppc-xl-xst.c
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4 changes: 0 additions & 4 deletions clang/test/CodeGen/X86/avx512f-builtins.c
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Original file line number Diff line number Diff line change
Expand Up @@ -10474,8 +10474,6 @@ __m512i test_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)
{
// CHECK-LABEL: test_mm512_mask_abs_epi32
// CHECK: [[ABS:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <16 x i32> [[ABS]] to <8 x i64>
// CHECK: [[ABS:%.*]] = bitcast <8 x i64> [[TMP]] to <16 x i32>
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> [[ABS]], <16 x i32> %{{.*}}
return _mm512_mask_abs_epi32 (__W,__U,__A);
}
Expand All @@ -10484,8 +10482,6 @@ __m512i test_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)
{
// CHECK-LABEL: test_mm512_maskz_abs_epi32
// CHECK: [[ABS:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <16 x i32> [[ABS]] to <8 x i64>
// CHECK: [[ABS:%.*]] = bitcast <8 x i64> [[TMP]] to <16 x i32>
// CHECK: select <16 x i1> %{{.*}}, <16 x i32> [[ABS]], <16 x i32> %{{.*}}
return _mm512_maskz_abs_epi32 (__U,__A);
}
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40 changes: 0 additions & 40 deletions clang/test/CodeGen/X86/avx512vl-builtins.c
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Expand Up @@ -4466,32 +4466,24 @@ __m256 test_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) {
__m128i test_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
// CHECK-LABEL: @test_mm_mask_abs_epi32
// CHECK: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[ABS]] to <2 x i64>
// CHECK: [[ABS:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> [[ABS]], <4 x i32> %{{.*}}
return _mm_mask_abs_epi32(__W,__U,__A);
}
__m128i test_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) {
// CHECK-LABEL: @test_mm_maskz_abs_epi32
// CHECK: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[ABS]] to <2 x i64>
// CHECK: [[ABS:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> %{{.*}}, <4 x i32> [[ABS]], <4 x i32> %{{.*}}
return _mm_maskz_abs_epi32(__U,__A);
}
__m256i test_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_mask_abs_epi32
// CHECK: [[ABS:%.*]] = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[ABS]] to <4 x i64>
// CHECK: [[ABS:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> [[ABS]], <8 x i32> %{{.*}}
return _mm256_mask_abs_epi32(__W,__U,__A);
}
__m256i test_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) {
// CHECK-LABEL: @test_mm256_maskz_abs_epi32
// CHECK: [[ABS:%.*]] = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false)
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[ABS]] to <4 x i64>
// CHECK: [[ABS:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> %{{.*}}, <8 x i32> [[ABS]], <8 x i32> %{{.*}}
return _mm256_maskz_abs_epi32(__U,__A);
}
Expand Down Expand Up @@ -4532,32 +4524,24 @@ __m256i test_mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A) {
__m128i test_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_max_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_max_epi32(__M,__A,__B);
}
__m128i test_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_max_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_max_epi32(__W,__M,__A,__B);
}
__m256i test_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_max_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_max_epi32(__M,__A,__B);
}
__m256i test_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_max_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_max_epi32(__W,__M,__A,__B);
}
Expand Down Expand Up @@ -4598,32 +4582,24 @@ __m256i test_mm256_max_epi64(__m256i __A, __m256i __B) {
__m128i test_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_max_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_max_epu32(__M,__A,__B);
}
__m128i test_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_max_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_max_epu32(__W,__M,__A,__B);
}
__m256i test_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_max_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_max_epu32(__M,__A,__B);
}
__m256i test_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_max_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_max_epu32(__W,__M,__A,__B);
}
Expand Down Expand Up @@ -4664,32 +4640,24 @@ __m256i test_mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256
__m128i test_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_min_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_min_epi32(__M,__A,__B);
}
__m128i test_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_min_epi32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_min_epi32(__W,__M,__A,__B);
}
__m256i test_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_min_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_min_epi32(__M,__A,__B);
}
__m256i test_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_min_epi32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_min_epi32(__W,__M,__A,__B);
}
Expand Down Expand Up @@ -4730,32 +4698,24 @@ __m256i test_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
__m128i test_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_min_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_maskz_min_epu32(__M,__A,__B);
}
__m128i test_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_min_epu32
// CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64>
// CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32>
// CHECK: select <4 x i1> {{.*}}, <4 x i32> [[RES]], <4 x i32> {{.*}}
return _mm_mask_min_epu32(__W,__M,__A,__B);
}
__m256i test_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_min_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_maskz_min_epu32(__M,__A,__B);
}
__m256i test_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_min_epu32
// CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
// CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64>
// CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32>
// CHECK: select <8 x i1> {{.*}}, <8 x i32> [[RES]], <8 x i32> {{.*}}
return _mm256_mask_min_epu32(__W,__M,__A,__B);
}
Expand Down
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