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Move relocation specifier constants to AArch64:: #144633

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22 changes: 11 additions & 11 deletions bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1081,15 +1081,15 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {

if (isADR(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_LO21 ||
RelType == ELF::R_AARCH64_TLSDESC_ADR_PREL21) {
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS, Ctx);
} else if (isADRP(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21 ||
RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21_NC ||
RelType == ELF::R_AARCH64_TLSDESC_ADR_PAGE21 ||
RelType == ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
RelType == ELF::R_AARCH64_ADR_GOT_PAGE) {
// Never emit a GOT reloc, we handled this in
// RewriteInstance::readRelocations().
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_PAGE, Ctx);
} else {
switch (RelType) {
case ELF::R_AARCH64_ADD_ABS_LO12_NC:
Expand All @@ -1103,18 +1103,18 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
case ELF::R_AARCH64_TLSDESC_LD64_LO12:
case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_LO12, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_LO12, Ctx);
case ELF::R_AARCH64_MOVW_UABS_G3:
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G3, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G3, Ctx);
case ELF::R_AARCH64_MOVW_UABS_G2:
case ELF::R_AARCH64_MOVW_UABS_G2_NC:
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G2_NC, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G2_NC, Ctx);
case ELF::R_AARCH64_MOVW_UABS_G1:
case ELF::R_AARCH64_MOVW_UABS_G1_NC:
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G1_NC, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G1_NC, Ctx);
case ELF::R_AARCH64_MOVW_UABS_G0:
case ELF::R_AARCH64_MOVW_UABS_G0_NC:
return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G0_NC, Ctx);
return MCSpecifierExpr::create(Expr, AArch64::S_ABS_G0_NC, Ctx);
default:
break;
}
Expand Down Expand Up @@ -2028,7 +2028,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.setOpcode(AArch64::MOVZXi);
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createExpr(
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G3, *Ctx)));
MCSpecifierExpr::create(Target, AArch64::S_ABS_G3, *Ctx)));
Inst.addOperand(MCOperand::createImm(0x30));
Seq.emplace_back(Inst);

Expand All @@ -2037,7 +2037,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createExpr(
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G2_NC, *Ctx)));
MCSpecifierExpr::create(Target, AArch64::S_ABS_G2_NC, *Ctx)));
Inst.addOperand(MCOperand::createImm(0x20));
Seq.emplace_back(Inst);

Expand All @@ -2046,7 +2046,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createExpr(
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G1_NC, *Ctx)));
MCSpecifierExpr::create(Target, AArch64::S_ABS_G1_NC, *Ctx)));
Inst.addOperand(MCOperand::createImm(0x10));
Seq.emplace_back(Inst);

Expand All @@ -2055,7 +2055,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createReg(AArch64::X16));
Inst.addOperand(MCOperand::createExpr(
MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G0_NC, *Ctx)));
MCSpecifierExpr::create(Target, AArch64::S_ABS_G0_NC, *Ctx)));
Inst.addOperand(MCOperand::createImm(0));
Seq.emplace_back(Inst);

Expand Down
14 changes: 7 additions & 7 deletions llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@
#include "AArch64TargetObjectFile.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "MCTargetDesc/AArch64InstPrinter.h"
#include "MCTargetDesc/AArch64MCExpr.h"
#include "MCTargetDesc/AArch64MCAsmInfo.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "MCTargetDesc/AArch64TargetStreamer.h"
#include "TargetInfo/AArch64TargetInfo.h"
Expand Down Expand Up @@ -910,15 +910,15 @@ void AArch64AsmPrinter::emitHwasanMemaccessSymbols(Module &M) {
// have a chance to save them.
EmitToStreamer(MCInstBuilder(AArch64::ADRP)
.addReg(AArch64::X16)
.addExpr(MCSpecifierExpr::create(
HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_PAGE,
OutContext)));
.addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef,
AArch64::S_GOT_PAGE,
OutContext)));
EmitToStreamer(MCInstBuilder(AArch64::LDRXui)
.addReg(AArch64::X16)
.addReg(AArch64::X16)
.addExpr(MCSpecifierExpr::create(
HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_LO12,
OutContext)));
.addExpr(MCSpecifierExpr::create(HwasanTagMismatchRef,
AArch64::S_GOT_LO12,
OutContext)));
EmitToStreamer(MCInstBuilder(AArch64::BR).addReg(AArch64::X16));
}
}
Expand Down
75 changes: 37 additions & 38 deletions llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@

#include "AArch64MCInstLower.h"
#include "AArch64MachineFunctionInfo.h"
#include "MCTargetDesc/AArch64MCExpr.h"
#include "MCTargetDesc/AArch64MCAsmInfo.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
Expand Down Expand Up @@ -147,29 +147,29 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandMachO(const MachineOperand &MO,
MCSymbol *Sym) const {
// FIXME: We would like an efficient form for this, so we don't have to do a
// lot of extra uniquing.
auto Spec = AArch64MCExpr::None;
auto Spec = AArch64::S_None;
if ((MO.getTargetFlags() & AArch64II::MO_GOT) != 0) {
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
Spec = AArch64MCExpr::M_GOTPAGE;
Spec = AArch64::S_MACHO_GOTPAGE;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_PAGEOFF)
Spec = AArch64MCExpr::M_GOTPAGEOFF;
Spec = AArch64::S_MACHO_GOTPAGEOFF;
else
llvm_unreachable("Unexpected target flags with MO_GOT on GV operand");
} else if ((MO.getTargetFlags() & AArch64II::MO_TLS) != 0) {
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
Spec = AArch64MCExpr::M_TLVPPAGE;
Spec = AArch64::S_MACHO_TLVPPAGE;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_PAGEOFF)
Spec = AArch64MCExpr::M_TLVPPAGEOFF;
Spec = AArch64::S_MACHO_TLVPPAGEOFF;
else
llvm_unreachable("Unexpected target flags with MO_TLS on GV operand");
} else {
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
Spec = AArch64MCExpr::M_PAGE;
Spec = AArch64::S_MACHO_PAGE;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_PAGEOFF)
Spec = AArch64MCExpr::M_PAGEOFF;
Spec = AArch64::S_MACHO_PAGEOFF;
}
// TODO: Migrate to MCSpecifierExpr::create like ELF.
const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Spec, Ctx);
Expand All @@ -186,8 +186,8 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
if (MO.getTargetFlags() & AArch64II::MO_GOT) {
const MachineFunction *MF = MO.getParent()->getParent()->getParent();
RefFlags |= (MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT()
? AArch64MCExpr::VK_GOT_AUTH
: AArch64MCExpr::VK_GOT);
? AArch64::S_GOT_AUTH
: AArch64::S_GOT);
} else if (MO.getTargetFlags() & AArch64II::MO_TLS) {
TLSModel::Model Model;
if (MO.isGlobal()) {
Expand All @@ -211,13 +211,13 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
}
switch (Model) {
case TLSModel::InitialExec:
RefFlags |= AArch64MCExpr::VK_GOTTPREL;
RefFlags |= AArch64::S_GOTTPREL;
break;
case TLSModel::LocalExec:
RefFlags |= AArch64MCExpr::VK_TPREL;
RefFlags |= AArch64::S_TPREL;
break;
case TLSModel::LocalDynamic:
RefFlags |= AArch64MCExpr::VK_DTPREL;
RefFlags |= AArch64::S_DTPREL;
break;
case TLSModel::GeneralDynamic: {
// TODO: it's probably better to introduce MO_TLS_AUTH or smth and avoid
Expand All @@ -226,37 +226,37 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
// making the field wider breaks static assertions.
const MachineFunction *MF = MO.getParent()->getParent()->getParent();
RefFlags |= MF->getInfo<AArch64FunctionInfo>()->hasELFSignedGOT()
? AArch64MCExpr::VK_TLSDESC_AUTH
: AArch64MCExpr::VK_TLSDESC;
? AArch64::S_TLSDESC_AUTH
: AArch64::S_TLSDESC;
break;
}
}
} else if (MO.getTargetFlags() & AArch64II::MO_PREL) {
RefFlags |= AArch64MCExpr::VK_PREL;
RefFlags |= AArch64::S_PREL;
} else {
// No modifier means this is a generic reference, classified as absolute for
// the cases where it matters (:abs_g0: etc).
RefFlags |= AArch64MCExpr::VK_ABS;
RefFlags |= AArch64::S_ABS;
}

if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
RefFlags |= AArch64MCExpr::VK_PAGE;
RefFlags |= AArch64::S_PAGE;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_PAGEOFF)
RefFlags |= AArch64MCExpr::VK_PAGEOFF;
RefFlags |= AArch64::S_PAGEOFF;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)
RefFlags |= AArch64MCExpr::VK_G3;
RefFlags |= AArch64::S_G3;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2)
RefFlags |= AArch64MCExpr::VK_G2;
RefFlags |= AArch64::S_G2;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1)
RefFlags |= AArch64MCExpr::VK_G1;
RefFlags |= AArch64::S_G1;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0)
RefFlags |= AArch64MCExpr::VK_G0;
RefFlags |= AArch64::S_G0;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_HI12)
RefFlags |= AArch64MCExpr::VK_HI12;
RefFlags |= AArch64::S_HI12;

if (MO.getTargetFlags() & AArch64II::MO_NC)
RefFlags |= AArch64MCExpr::VK_NC;
RefFlags |= AArch64::S_NC;

const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
if (!MO.isJTI() && MO.getOffset())
Expand All @@ -276,31 +276,31 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,

if (MO.getTargetFlags() & AArch64II::MO_TLS) {
if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGEOFF)
RefFlags |= AArch64MCExpr::VK_SECREL_LO12;
RefFlags |= AArch64::S_SECREL_LO12;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_HI12)
RefFlags |= AArch64MCExpr::VK_SECREL_HI12;
RefFlags |= AArch64::S_SECREL_HI12;

} else if (MO.getTargetFlags() & AArch64II::MO_S) {
RefFlags |= AArch64MCExpr::VK_SABS;
RefFlags |= AArch64::S_SABS;
} else {
RefFlags |= AArch64MCExpr::VK_ABS;
RefFlags |= AArch64::S_ABS;

if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
RefFlags |= AArch64MCExpr::VK_PAGE;
RefFlags |= AArch64::S_PAGE;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
AArch64II::MO_PAGEOFF)
RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC;
RefFlags |= AArch64::S_PAGEOFF | AArch64::S_NC;
}

if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)
RefFlags |= AArch64MCExpr::VK_G3;
RefFlags |= AArch64::S_G3;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G2)
RefFlags |= AArch64MCExpr::VK_G2;
RefFlags |= AArch64::S_G2;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G1)
RefFlags |= AArch64MCExpr::VK_G1;
RefFlags |= AArch64::S_G1;
else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0)
RefFlags |= AArch64MCExpr::VK_G0;
RefFlags |= AArch64::S_G0;

// FIXME: Currently we only set VK_NC for MO_G3/MO_G2/MO_G1/MO_G0. This is
// because setting VK_NC for others would mean setting their respective
Expand All @@ -309,7 +309,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
auto MOFrag = (MO.getTargetFlags() & AArch64II::MO_FRAGMENT);
if (MOFrag == AArch64II::MO_G3 || MOFrag == AArch64II::MO_G2 ||
MOFrag == AArch64II::MO_G1 || MOFrag == AArch64II::MO_G0)
RefFlags |= AArch64MCExpr::VK_NC;
RefFlags |= AArch64::S_NC;
}

const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
Expand All @@ -318,8 +318,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);

auto RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
assert(RefKind != AArch64MCExpr::VK_INVALID &&
"Invalid relocation requested");
assert(RefKind != AArch64::S_INVALID && "Invalid relocation requested");
Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);

return MCOperand::createExpr(Expr);
Expand Down
10 changes: 5 additions & 5 deletions llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@

#include "AArch64TargetObjectFile.h"
#include "AArch64TargetMachine.h"
#include "MCTargetDesc/AArch64MCExpr.h"
#include "MCTargetDesc/AArch64MCAsmInfo.h"
#include "MCTargetDesc/AArch64TargetStreamer.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/MachineModuleInfoImpls.h"
Expand All @@ -25,7 +25,7 @@ using namespace dwarf;
void AArch64_ELFTargetObjectFile::Initialize(MCContext &Ctx,
const TargetMachine &TM) {
TargetLoweringObjectFileELF::Initialize(Ctx, TM);
PLTRelativeSpecifier = AArch64MCExpr::VK_PLT;
PLTRelativeSpecifier = AArch64::S_PLT;
SupportIndirectSymViaGOTPCRel = true;

// AARCH64 ELF ABI does not define static relocation type for TLS offset
Expand Down Expand Up @@ -61,7 +61,7 @@ const MCExpr *AArch64_ELFTargetObjectFile::getIndirectSymViaGOTPCRel(
int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
int64_t FinalOffset = Offset + MV.getConstant();
const MCExpr *Res =
MCSymbolRefExpr::create(Sym, AArch64MCExpr::VK_GOTPCREL, getContext());
MCSymbolRefExpr::create(Sym, AArch64::S_GOTPCREL, getContext());
const MCExpr *Off = MCConstantExpr::create(FinalOffset, getContext());
return MCBinaryExpr::createAdd(Res, Off, getContext());
}
Expand All @@ -80,7 +80,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getTTypeGlobalReference(
if (Encoding & (DW_EH_PE_indirect | DW_EH_PE_pcrel)) {
const MCSymbol *Sym = TM.getSymbol(GV);
const MCExpr *Res =
MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext());
MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext());
MCSymbol *PCSym = getContext().createTempSymbol();
Streamer.emitLabel(PCSym);
const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext());
Expand All @@ -105,7 +105,7 @@ const MCExpr *AArch64_MachoTargetObjectFile::getIndirectSymViaGOTPCRel(
// On ARM64 Darwin, we can reference symbols with foo@GOT-., which
// is an indirect pc-relative reference.
const MCExpr *Res =
MCSymbolRefExpr::create(Sym, AArch64MCExpr::M_GOT, getContext());
MCSymbolRefExpr::create(Sym, AArch64::S_MACHO_GOT, getContext());
MCSymbol *PCSym = getContext().createTempSymbol();
Streamer.emitLabel(PCSym);
const MCExpr *PC = MCSymbolRefExpr::create(PCSym, getContext());
Expand Down
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