[AMDGPU] Handle direct loads to LDS in memory model #142018
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Add additional waitcnt insertion to ensure proper ordering between LDS operations and direct loads from global memory to LDS on pre-GFX10 hardware. Direct LDS loads perform both a global memory load and an LDS store, which can be reordered with respect to other LDS operations without explicit synchronization. This can cause ordering violations even within a single thread. The change conservatively inserts vmcnt(0) waits for all sync scopes when the LDS address space is involved. Future optimizations in SIInsertWaitcnts can relax this to only wait for outstanding direct LDS loads rather than all vmcnt events. This change only affects LDS address space synchronization and preserves existing cross-address space ordering behavior.
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Add additional waitcnt insertion to ensure proper ordering between LDS
operations and direct loads from global memory to LDS on pre-GFX10
hardware.
Direct LDS loads perform both a global memory load and an LDS store,
which can be reordered with respect to other LDS operations without
explicit synchronization. This can cause ordering violations even within
a single thread.
The change conservatively inserts vmcnt(0) waits for all sync scopes
when the LDS address space is involved. Future optimizations in
SIInsertWaitcnts can relax this to only wait for outstanding direct LDS
loads rather than all vmcnt events.
This change only affects LDS address space synchronization and preserves
existing cross-address space ordering behavior.