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[InstCombine] Add Missed Optimization #141962
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@llvm/pr-subscribers-llvm-analysis @llvm/pr-subscribers-llvm-transforms Author: Bobby SONG (bobby-b-song) ChangesAddresses the #141479 issue. By adding the following optimiztion
to
Full diff: https://github.com/llvm/llvm-project/pull/141962.diff 1 Files Affected:
diff --git a/llvm/test/Transforms/InstCombine/and-comparison-not-always-false.ll b/llvm/test/Transforms/InstCombine/and-comparison-not-always-false.ll
new file mode 100644
index 0000000000000..174d97d30bcf8
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/and-comparison-not-always-false.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+define i1 @test(i32 %0, i32 %1) {
+; CHECK-LABEL: define i1 @test(
+; CHECK-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; CHECK-NEXT: [[COMMON_RET:.*:]]
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP0]], -1
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ule i32 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP1]], -1
+; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i32 [[TMP0]], [[TMP4]]
+; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = and i1 [[TMP3]], [[TMP5]]
+; CHECK-NEXT: ret i1 [[COMMON_RET_OP]]
+;
+common.ret:
+ %2 = xor i32 %0, -1
+ %3 = icmp ule i32 %1, %2
+ %4 = xor i32 %1, -1
+ %5 = icmp ugt i32 %0, %4
+ %common.ret.op = and i1 %3, %5
+ ret i1 %common.ret.op
+}
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I've further extended the PR with signed numbers and more inclusive/exclusive ranges, the proof of alive2 is at https://alive2.llvm.org/ce/z/z2VcMn. |
Add test for optimization Extend the case further to signed intergers and more in/exclusive ranges Update test for optimization
Addresses the #141479 issue. By adding the following optimiztion
to