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[BOLT] [PowerPC] Port #140894

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kostasalv
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@kostasalv kostasalv commented May 21, 2025

Scope

This patch represents an initial portion of the ongoing work to port [BOLT] for [PowerPC] architecture.
Additional changes will follow to complete the port.

What does this patch do?

This pull request ports the [BOLT] createPushRegisters method to [PowerPC] target. That helps [BOLT] generate
[PowerPC] instructions to save registers on the stack.

Motivation

Port [BOLT] for [PowerPC] architecture.

Testing

  • Built with 'ninja'
  • Ran 'ninja check-lit' (all tests pass)
  • Ran clang-format, no changes required

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github-actions bot commented May 21, 2025

✅ With the latest revision this PR passed the C/C++ code formatter.

@maksfb
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maksfb commented May 22, 2025

That's exciting to see BOLT getting PowerPC support!

Could you share more details about the project? Were you able to see real gains or is this still WIP?

@kostasalv
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Thank you for the feedback!
This is an initial contribution towards PowerPC support, and the work is still in progress. I plan to follow up with additional changes to complete the port. I don't have performance data available yet, but I plan to collect and share results as the implementation progresses.

@kostasalv kostasalv changed the title BOLT PowerPC Port [BOLT] PowerPC Port May 26, 2025
@kostasalv kostasalv changed the title [BOLT] PowerPC Port [BOLT] [PowerPC] Port May 26, 2025
@kostasalv
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Hi @maksfb, I did git push force recently. I noticed the [BOLT] label disappeared. Could it be re-applied manually? Thanks!

@maksfb maksfb added the BOLT label May 27, 2025
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llvmbot commented May 27, 2025

@llvm/pr-subscribers-bolt

Author: Kostas (kostasalv)

Changes

Scope

This patch represents an initial portion of the ongoing work to port [BOLT] for [PowerPC] architecture.
Additional changes will follow to complete the port.

What does this patch do?

This pull request ports the [BOLT] createPushRegisters method to [PowerPC] target. That helps [BOLT] generate
[PowerPC] instructions to save registers on the stack.

Motivation

Port [BOLT] for [PowerPC] architecture.

Testing

  • Built with 'ninja'
  • Ran 'ninja check-lit' (all tests pass)
  • Ran clang-format, no changes required

Full diff: https://github.com/llvm/llvm-project/pull/140894.diff

6 Files Affected:

  • (modified) bolt/CMakeLists.txt (+1-1)
  • (modified) bolt/include/bolt/Core/MCPlusBuilder.h (+5)
  • (modified) bolt/lib/Rewrite/RewriteInstance.cpp (+5)
  • (modified) bolt/lib/Target/CMakeLists.txt (+3-1)
  • (added) bolt/lib/Target/PowerPC/CMakeLists.txt (+29)
  • (added) bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp (+54)
diff --git a/bolt/CMakeLists.txt b/bolt/CMakeLists.txt
index 52c796518ac05..c18216d760808 100644
--- a/bolt/CMakeLists.txt
+++ b/bolt/CMakeLists.txt
@@ -58,7 +58,7 @@ endif() # standalone
 
 # Determine default set of targets to build -- the intersection of
 # those BOLT supports and those LLVM is targeting.
-set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV")
+set(BOLT_TARGETS_TO_BUILD_all "AArch64;X86;RISCV;PowerPC")
 set(BOLT_TARGETS_TO_BUILD_default)
 foreach (tgt ${BOLT_TARGETS_TO_BUILD_all})
   if (tgt IN_LIST LLVM_TARGETS_TO_BUILD)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h
index 132d58f3f9f79..fa043a49bb87e 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -2293,6 +2293,11 @@ MCPlusBuilder *createRISCVMCPlusBuilder(const MCInstrAnalysis *,
                                         const MCRegisterInfo *,
                                         const MCSubtargetInfo *);
 
+MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *,
+                                          const MCInstrInfo *,
+                                          const MCRegisterInfo *,
+                                          const MCSubtargetInfo *);
+
 } // namespace bolt
 } // namespace llvm
 
diff --git a/bolt/lib/Rewrite/RewriteInstance.cpp b/bolt/lib/Rewrite/RewriteInstance.cpp
index ad062ea3622d1..dbd9ecbaf1c66 100644
--- a/bolt/lib/Rewrite/RewriteInstance.cpp
+++ b/bolt/lib/Rewrite/RewriteInstance.cpp
@@ -304,6 +304,11 @@ MCPlusBuilder *createMCPlusBuilder(const Triple::ArchType Arch,
     return createRISCVMCPlusBuilder(Analysis, Info, RegInfo, STI);
 #endif
 
+#ifdef POWERPC_AVAILABLE
+  if (Arch == Triple::ppc64 || Arch == Triple::ppc64le)
+    return createPowerPCMCPlusBuilder(Analysis, Info, RegInfo, STI);
+#endif
+
   llvm_unreachable("architecture unsupported by MCPlusBuilder");
 }
 
diff --git a/bolt/lib/Target/CMakeLists.txt b/bolt/lib/Target/CMakeLists.txt
index eae8ebdddbf3f..38d423ac9483c 100644
--- a/bolt/lib/Target/CMakeLists.txt
+++ b/bolt/lib/Target/CMakeLists.txt
@@ -1,3 +1,5 @@
 foreach (tgt ${BOLT_TARGETS_TO_BUILD})
   add_subdirectory(${tgt})
-endforeach()
+  string(TOUPPER ${tgt} TGT_UPPER)
+  add_definitions(-D${TGT_UPPER}_AVAILABLE)
+endforeach()
\ No newline at end of file
diff --git a/bolt/lib/Target/PowerPC/CMakeLists.txt b/bolt/lib/Target/PowerPC/CMakeLists.txt
new file mode 100644
index 0000000000000..c1d2a054396d7
--- /dev/null
+++ b/bolt/lib/Target/PowerPC/CMakeLists.txt
@@ -0,0 +1,29 @@
+add_llvm_library(LLVMBOLTTargetPowerPC
+    PPCMCPlusBuilder.cpp
+)
+
+target_include_directories(LLVMBOLTTargetPowerPC PRIVATE
+    ${LLVM_BINARY_DIR}/include
+    ${LLVM_SOURCE_DIR}/include
+)
+
+file(MAKE_DIRECTORY "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC")
+
+foreach(incfile IN ITEMS
+    PPCGenInstrInfo.inc
+    PPCGenRegisterInfo.inc
+)
+    add_custom_command(
+        OUTPUT "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+        COMMAND ${CMAKE_COMMAND} -E copy_if_different
+            "${LLVM_BINARY_DIR}/lib/Target/PowerPC/${incfile}"
+            "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+        DEPENDS "${LLVM_BINARY_DIR}/lib/Target/PowerPC/${incfile}"
+        COMMENT "Copying ${incfile} to include directory"
+    )
+    add_custom_target(
+        "BoltCopy${incfile}" ALL
+        DEPENDS "${LLVM_BINARY_DIR}/include/llvm/Target/PowerPC/${incfile}"
+    )
+    add_dependencies(LLVMBOLTTargetPowerPC "BoltCopy${incfile}")
+endforeach()
\ No newline at end of file
diff --git a/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp b/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp
new file mode 100644
index 0000000000000..39d5ed2d3e36e
--- /dev/null
+++ b/bolt/lib/Target/PowerPC/PPCMCPlusBuilder.cpp
@@ -0,0 +1,54 @@
+//===- bolt/Target/PowerPC/PPCMCPlusBuilder.cpp -----------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file provides PowerPC-specific MCPlus builder.
+//
+//===----------------------------------------------------------------------===//
+
+#include "bolt/Core/MCPlusBuilder.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#define GET_INSTRINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenInstrInfo.inc"
+#define GET_REGINFO_ENUM
+#include "llvm/Target/PowerPC/PPCGenRegisterInfo.inc"
+
+namespace llvm {
+namespace bolt {
+
+class PPCMCPlusBuilder : public MCPlusBuilder {
+public:
+  using MCPlusBuilder::MCPlusBuilder;
+
+  // Create instructions to push two registers onto the stack
+  static void createPushRegisters(MCInst &Inst1, MCInst &Inst2, MCPhysReg Reg1,
+                                  MCPhysReg /*Reg2*/) {
+
+    Inst1.clear();
+    Inst1.setOpcode(PPC::STDU);
+    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // destination (SP)
+    Inst1.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+    Inst1.addOperand(MCOperand::createImm(-16));     // offset
+
+    Inst2.clear();
+    Inst2.setOpcode(PPC::STD);
+    Inst2.addOperand(MCOperand::createReg(Reg1));    // source register
+    Inst2.addOperand(MCOperand::createReg(PPC::R1)); // base (SP)
+    Inst2.addOperand(MCOperand::createImm(0));       // offset
+  }
+};
+
+MCPlusBuilder *createPowerPCMCPlusBuilder(const MCInstrAnalysis *Analysis,
+                                          const MCInstrInfo *Info,
+                                          const MCRegisterInfo *RegInfo,
+                                          const MCSubtargetInfo *STI) {
+  return new PPCMCPlusBuilder(Analysis, Info, RegInfo, STI);
+}
+
+} // namespace bolt
+} // namespace llvm

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