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[AMDGPU] Remove TH_BYPASS from CPol #139887

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[AMDGPU] Remove TH_BYPASS from CPol #139887

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e3260cc
remove BYPASS
Shoreshen May 14, 2025
82dafe3
fix clang_format error
Shoreshen May 14, 2025
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4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5086,7 +5086,7 @@ bool AMDGPUAsmParser::validateTHAndScopeBits(const MCInst &Inst,
(TH == AMDGPU::CPol::TH_NT_HT)))
return PrintError("invalid th value for SMEM instruction");

if (TH == AMDGPU::CPol::TH_BYPASS) {
if (TH == AMDGPU::CPol::TH_WB) { // TH_LU == TH_WB == 3
if ((Scope != AMDGPU::CPol::SCOPE_SYS &&
CPol & AMDGPU::CPol::TH_REAL_BYPASS) ||
(Scope == AMDGPU::CPol::SCOPE_SYS &&
Expand Down Expand Up @@ -6774,7 +6774,7 @@ ParseStatus AMDGPUAsmParser::parseTH(OperandVector &Operands, int64_t &TH) {
.Case("RT_NT", AMDGPU::CPol::TH_RT_NT)
.Case("NT_HT", AMDGPU::CPol::TH_NT_HT)
.Case("NT_WB", AMDGPU::CPol::TH_NT_WB)
.Case("BYPASS", AMDGPU::CPol::TH_BYPASS)
.Case("BYPASS", AMDGPU::CPol::TH_LU)
.Default(0xffffffff);
}

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5 changes: 2 additions & 3 deletions llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
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Expand Up @@ -206,9 +206,8 @@ void AMDGPUInstPrinter::printTH(const MCInst *MI, int64_t TH, int64_t Scope,
case AMDGPU::CPol::TH_HT:
O << "HT";
break;
case AMDGPU::CPol::TH_BYPASS: // or LU or WB
O << (Scope == AMDGPU::CPol::SCOPE_SYS ? "BYPASS"
: (IsStore ? "WB" : "LU"));
case AMDGPU::CPol::TH_LU: // TH_LU == TH_WB == 3
O << (IsStore ? "WB" : "LU");
break;
case AMDGPU::CPol::TH_NT_RT:
O << "NT_RT";
Expand Down
21 changes: 10 additions & 11 deletions llvm/lib/Target/AMDGPU/SIDefines.h
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Expand Up @@ -369,17 +369,16 @@ enum CPol {
// Below are GFX12+ cache policy bits

// Temporal hint
TH = 0x7, // All TH bits
TH_RT = 0, // regular
TH_NT = 1, // non-temporal
TH_HT = 2, // high-temporal
TH_LU = 3, // last use
TH_WB = 3, // regular (CU, SE), high-temporal with write-back (MALL)
TH_NT_RT = 4, // non-temporal (CU, SE), regular (MALL)
TH_RT_NT = 5, // regular (CU, SE), non-temporal (MALL)
TH_NT_HT = 6, // non-temporal (CU, SE), high-temporal (MALL)
TH_NT_WB = 7, // non-temporal (CU, SE), high-temporal with write-back (MALL)
TH_BYPASS = 3, // only to be used with scope = 3
TH = 0x7, // All TH bits
TH_RT = 0, // regular
TH_NT = 1, // non-temporal
TH_HT = 2, // high-temporal
TH_LU = 3, // last use
TH_WB = 3, // regular (CU, SE), high-temporal with write-back (MALL)
TH_NT_RT = 4, // non-temporal (CU, SE), regular (MALL)
TH_RT_NT = 5, // regular (CU, SE), non-temporal (MALL)
TH_NT_HT = 6, // non-temporal (CU, SE), high-temporal (MALL)
TH_NT_WB = 7, // non-temporal (CU, SE), high-temporal with write-back (MALL)

TH_RESERVED = 7, // unused value for load insts

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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-lastuse-metadata.ll
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Expand Up @@ -106,7 +106,7 @@ define amdgpu_kernel void @buffer_last_use_and_volatile_load(ptr addrspace(7) %i
; GFX12-NEXT: s_mov_b32 s13, s2
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-NEXT: s_or_b64 s[8:9], s[8:9], s[12:13]
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX12-NEXT: buffer_load_b32 v0, v0, s[8:11], null offen th:TH_LOAD_LU scope:SCOPE_SYS
; GFX12-NEXT: s_clause 0x1
; GFX12-NEXT: s_load_b32 s13, s[4:5], 0x30
; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x20
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
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Expand Up @@ -71,7 +71,7 @@ define amdgpu_kernel void @flat_last_use_and_volatile_load(ptr %in, ptr %out) {
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_mov_b32_e32 v0, s2
; GFX12-NEXT: v_mov_b32_e32 v1, s3
; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX12-NEXT: flat_load_b32 v2, v[0:1] th:TH_LOAD_LU scope:SCOPE_SYS
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_loadcnt 0x0
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
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Expand Up @@ -52,7 +52,7 @@ define amdgpu_kernel void @global_last_use_and_volatile_load(ptr addrspace(1) %i
; GFX12-NEXT: s_load_b64 s[2:3], s[4:5], 0x0
; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x8
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3] th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX12-NEXT: global_load_b32 v1, v0, s[2:3] th:TH_LOAD_LU scope:SCOPE_SYS
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_loadcnt 0x0
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
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Expand Up @@ -51,7 +51,7 @@ define amdgpu_kernel void @private_last_use_and_volatile_load(ptr addrspace(5) %
; GFX12-NEXT: s_load_b64 s[0:1], s[4:5], 0x8
; GFX12-NEXT: v_mov_b32_e32 v0, 0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: scratch_load_b32 v1, off, s2 th:TH_LOAD_BYPASS scope:SCOPE_SYS
; GFX12-NEXT: scratch_load_b32 v1, off, s2 th:TH_LOAD_LU scope:SCOPE_SYS
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_loadcnt 0x0
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/gfx12_asm_features.s
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Expand Up @@ -76,7 +76,7 @@ buffer_load_b32 v5, off, s[8:11], s3 offset:8388607 scope:SCOPE_DEV th:TH_LOAD_N
// GFX12: buffer_load_b32 v5, off, s[8:11], s3 offset:8388607 th:TH_LOAD_NT_HT scope:SCOPE_DEV ; encoding: [0x03,0x00,0x05,0xc4,0x05,0x10,0xe8,0x00,0x00,0xff,0xff,0x7f]

tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 th:TH_LOAD_BYPASS scope:SCOPE_SYS
// GFX12: tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 th:TH_LOAD_BYPASS scope:SCOPE_SYS ; encoding: [0x03,0x00,0x22,0xc4,0x04,0xe0,0xbc,0x02,0x00,0xff,0xff,0x7f]
// GFX12: tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 th:TH_LOAD_LU scope:SCOPE_SYS ; encoding: [0x03,0x00,0x22,0xc4,0x04,0xe0,0xbc,0x02,0x00,0xff,0xff,0x7f]

tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 scope:SCOPE_SYS th:TH_LOAD_BYPASS
// GFX12: tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 th:TH_LOAD_BYPASS scope:SCOPE_SYS ; encoding: [0x03,0x00,0x22,0xc4,0x04,0xe0,0xbc,0x02,0x00,0xff,0xff,0x7f]
// GFX12: tbuffer_load_d16_format_x v4, off, ttmp[4:7], s3 format:[BUF_FMT_8_UINT] offset:8388607 th:TH_LOAD_LU scope:SCOPE_SYS ; encoding: [0x03,0x00,0x22,0xc4,0x04,0xe0,0xbc,0x02,0x00,0xff,0xff,0x7f]
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