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[MLIR][DRR] Fix inconsistent operand and arg index usage #139816
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What happens with this without the changes to the RewriterGen.cpp file?
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Without the changes this test fails on a cast assertion:
Coming from:
llvm-project/mlir/tools/mlir-tblgen/RewriterGen.cpp
Lines 773 to 778 in 751e6c0
llvm-project/mlir/tools/mlir-tblgen/RewriterGen.cpp
Lines 677 to 683 in bf1d4a0
In
emitEitherOperand()
, we check ifop.getArg(argIndex)
is aNamedTypeConstraint
, but inemitOperandMatch
we castop.getArg(operandIndex)
. In the test case above,operandIndex
andargIndex
get out of sync due to the Attribute being in the front which leads to a cast with the wrong index (specificallyargIndex=1
referring to$arg1
andoperandIndex=0
referring to theConstantAttr
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Can we add a test for this rewrite though to ensure it works as expected?
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Added a test for this in
pattern.mlir
, also cleaned up surrounding tests to match the style of the rest of the file.