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[InstCombine][DebugInfo] Update debug value uses in freelyInvertAllUsersOf #137013

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[InstCombine][DebugInfo] Update debug value uses in freelyInvertAllUsersOf #137013

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8d37b69
[InstCombine] Add pre-commit tests. NFC.
dtcxzyw Apr 23, 2025
0eb30b7
[InstCombine] Update debug value uses in `freelyInvertAllUsersOf`
dtcxzyw Apr 23, 2025
252ba6f
[InstCombine] Simplify code. NFC.
dtcxzyw Apr 25, 2025
4af0ede
[InstCombine] Simplify tests. NFC.
dtcxzyw Apr 25, 2025
1de469b
[InstCombine] Address review comments. NFC.
dtcxzyw Apr 25, 2025
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[InstCombine] Update debug value uses in freelyInvertAllUsersOf
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@dtcxzyw
dtcxzyw committed Apr 23, 2025
commit 0eb30b72b40df762e6e6ac1453efb135e22851c4
18 changes: 18 additions & 0 deletions llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1396,6 +1396,24 @@ void InstCombinerImpl::freelyInvertAllUsersOf(Value *I, Value *IgnoredUser) {
"canFreelyInvertAllUsersOf() ?");
}
}

// Update pre-existing debug value uses.
SmallVector<DbgValueInst *, 4> DbgValues;
SmallVector<DbgVariableRecord *, 4> DbgVariableRecords;
llvm::findDbgValues(DbgValues, I, &DbgVariableRecords);
auto ApplyNot = [](DIExpression *Src) {
SmallVector<uint64_t> Elements;
Elements.reserve(Src->getElements().size() + 1);
Elements.push_back(dwarf::DW_OP_not);
Elements.append(Src->getElements().begin(), Src->getElements().end());
return DIExpression::get(Src->getContext(), Elements);
};

for (auto *DVI : DbgValues)
DVI->setExpression(ApplyNot(DVI->getExpression()));

for (DbgVariableRecord *DVR : DbgVariableRecords)
DVR->setExpression(ApplyNot(DVR->getExpression()));
}

/// Given a 'sub' instruction, return the RHS of the instruction if the LHS is a
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2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/debuginfo-invert.ll
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Expand Up @@ -11,7 +11,7 @@ define i32 @test(i32 noundef %x, i32 noundef %y) !dbg !10 {
; CHECK-NEXT: #dbg_value(i32 [[X]], [[META15:![0-9]+]], !DIExpression(), [[META18:![0-9]+]])
; CHECK-NEXT: #dbg_value(i32 [[Y]], [[META16:![0-9]+]], !DIExpression(), [[META18]])
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[X]], 0, !dbg [[DBG19:![0-9]+]]
; CHECK-NEXT: #dbg_value(i1 [[CMP_NOT]], [[META17:![0-9]+]], !DIExpression(DW_OP_LLVM_convert, 1, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), [[META18]])
; CHECK-NEXT: #dbg_value(i1 [[CMP_NOT]], [[META17:![0-9]+]], !DIExpression(DW_OP_not, DW_OP_LLVM_convert, 1, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value), [[META18]])
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[Y]], 1, !dbg [[DBG20:![0-9]+]]
; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP_NOT]], i32 0, i32 [[TMP0]], !dbg [[DBG20]]
; CHECK-NEXT: ret i32 [[AND]], !dbg [[DBG21:![0-9]+]]
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