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[MSan] Separated PPC32 va_arg helper from PPC64 #131827

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Merged
merged 3 commits into from
Apr 9, 2025
Merged

[MSan] Separated PPC32 va_arg helper from PPC64 #131827

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04a253e
[MSan] Updated PPC32 va_arg helper
Apr 8, 2025
87be1b8
Change IRB.getInt32Ty() to MS.IntptrTy, fix the tests
Apr 9, 2025
19fae2c
fixup! Change IRB.getInt32Ty() to MS.IntptrTy, fix the tests
Apr 9, 2025
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197 changes: 111 additions & 86 deletions llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -846,9 +846,9 @@ void MemorySanitizer::createKernelApi(Module &M, const TargetLibraryInfo &TLI) {
}

MsanMetadataPtrForLoadN = getOrInsertMsanMetadataFunction(
M, "__msan_metadata_ptr_for_load_n", PtrTy, IRB.getInt64Ty());
M, "__msan_metadata_ptr_for_load_n", PtrTy, IntptrTy);
MsanMetadataPtrForStoreN = getOrInsertMsanMetadataFunction(
M, "__msan_metadata_ptr_for_store_n", PtrTy, IRB.getInt64Ty());
M, "__msan_metadata_ptr_for_store_n", PtrTy, IntptrTy);

// Functions for poisoning and unpoisoning memory.
MsanPoisonAllocaFn = M.getOrInsertFunction(
Expand Down Expand Up @@ -6399,8 +6399,8 @@ struct VarArgPowerPC64Helper : public VarArgHelperBase {
Value *VAArgSize = nullptr;

VarArgPowerPC64Helper(Function &F, MemorySanitizer &MS,
MemorySanitizerVisitor &MSV, unsigned VAListTagSize)
: VarArgHelperBase(F, MS, MSV, VAListTagSize) {}
MemorySanitizerVisitor &MSV)
: VarArgHelperBase(F, MS, MSV, /*VAListTagSize=*/8) {}

void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
// For PowerPC, we need to deal with alignment of stack arguments -
Expand All @@ -6414,15 +6414,10 @@ struct VarArgPowerPC64Helper : public VarArgHelperBase {
// Parameter save area starts at 48 bytes from frame pointer for ABIv1,
// and 32 bytes for ABIv2. This is usually determined by target
// endianness, but in theory could be overridden by function attribute.
if (TargetTriple.isPPC64()) {
if (TargetTriple.isPPC64ELFv2ABI())
VAArgBase = 32;
else
VAArgBase = 48;
} else {
// Parameter save area is 8 bytes from frame pointer in PPC32
VAArgBase = 8;
}
if (TargetTriple.isPPC64ELFv2ABI())
VAArgBase = 32;
else
VAArgBase = 48;
unsigned VAArgOffset = VAArgBase;
const DataLayout &DL = F.getDataLayout();
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
Expand Down Expand Up @@ -6524,11 +6519,6 @@ struct VarArgPowerPC64Helper : public VarArgHelperBase {
Value *VAListTag = OrigInst->getArgOperand(0);
Value *RegSaveAreaPtrPtr = IRB.CreatePtrToInt(VAListTag, MS.IntptrTy);

// In PPC32 va_list_tag is a struct, whereas in PPC64 it's a pointer
if (!TargetTriple.isPPC64()) {
RegSaveAreaPtrPtr =
IRB.CreateAdd(RegSaveAreaPtrPtr, ConstantInt::get(MS.IntptrTy, 8));
}
RegSaveAreaPtrPtr = IRB.CreateIntToPtr(RegSaveAreaPtrPtr, MS.PtrTy);

Value *RegSaveAreaPtr = IRB.CreateLoad(MS.PtrTy, RegSaveAreaPtrPtr);
Expand All @@ -6551,42 +6541,27 @@ struct VarArgPowerPC32Helper : public VarArgHelperBase {
Value *VAArgSize = nullptr;

VarArgPowerPC32Helper(Function &F, MemorySanitizer &MS,
MemorySanitizerVisitor &MSV, unsigned VAListTagSize)
: VarArgHelperBase(F, MS, MSV, VAListTagSize) {}
MemorySanitizerVisitor &MSV)
: VarArgHelperBase(F, MS, MSV, /*VAListTagSize=*/12) {}

void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
// For PowerPC, we need to deal with alignment of stack arguments -
// they are mostly aligned to 8 bytes, but vectors and i128 arrays
// are aligned to 16 bytes, byvals can be aligned to 8 or 16 bytes,
// For that reason, we compute current offset from stack pointer (which is
// always properly aligned), and offset for the first vararg, then subtract
// them.
unsigned VAArgBase;
Triple TargetTriple(F.getParent()->getTargetTriple());
// Parameter save area starts at 48 bytes from frame pointer for ABIv1,
// and 32 bytes for ABIv2. This is usually determined by target
// endianness, but in theory could be overridden by function attribute.
if (TargetTriple.isPPC64()) {
if (TargetTriple.isPPC64ELFv2ABI())
VAArgBase = 32;
else
VAArgBase = 48;
} else {
// Parameter save area is 8 bytes from frame pointer in PPC32
VAArgBase = 8;
}
// Parameter save area is 8 bytes from frame pointer in PPC32
VAArgBase = 8;
unsigned VAArgOffset = VAArgBase;
const DataLayout &DL = F.getDataLayout();
unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
bool IsFixed = ArgNo < CB.getFunctionType()->getNumParams();
bool IsByVal = CB.paramHasAttr(ArgNo, Attribute::ByVal);
if (IsByVal) {
assert(A->getType()->isPointerTy());
Type *RealTy = CB.getParamByValType(ArgNo);
uint64_t ArgSize = DL.getTypeAllocSize(RealTy);
Align ArgAlign = CB.getParamAlign(ArgNo).value_or(Align(8));
if (ArgAlign < 8)
ArgAlign = Align(8);
Align ArgAlign = CB.getParamAlign(ArgNo).value_or(Align(IntptrSize));
if (ArgAlign < IntptrSize)
ArgAlign = Align(IntptrSize);
VAArgOffset = alignTo(VAArgOffset, ArgAlign);
if (!IsFixed) {
Value *Base =
Expand All @@ -6601,41 +6576,47 @@ struct VarArgPowerPC32Helper : public VarArgHelperBase {
kShadowTLSAlignment, ArgSize);
}
}
VAArgOffset += alignTo(ArgSize, Align(8));
VAArgOffset += alignTo(ArgSize, Align(IntptrSize));
} else {
Value *Base;
uint64_t ArgSize = DL.getTypeAllocSize(A->getType());
Align ArgAlign = Align(8);
if (A->getType()->isArrayTy()) {
// Arrays are aligned to element size, except for long double
// arrays, which are aligned to 8 bytes.
Type *ElementTy = A->getType()->getArrayElementType();
if (!ElementTy->isPPC_FP128Ty())
ArgAlign = Align(DL.getTypeAllocSize(ElementTy));
} else if (A->getType()->isVectorTy()) {
// Vectors are naturally aligned.
ArgAlign = Align(ArgSize);
}
if (ArgAlign < 8)
ArgAlign = Align(8);
VAArgOffset = alignTo(VAArgOffset, ArgAlign);
if (DL.isBigEndian()) {
// Adjusting the shadow for argument with size < 8 to match the
// placement of bits in big endian system
if (ArgSize < 8)
VAArgOffset += (8 - ArgSize);
}
if (!IsFixed) {
Base =
getShadowPtrForVAArgument(IRB, VAArgOffset - VAArgBase, ArgSize);
if (Base)
IRB.CreateAlignedStore(MSV.getShadow(A), Base, kShadowTLSAlignment);
Type *ArgTy = A->getType();

// On PPC 32 floating point variable arguments are stored in separate
// area: fp_save_area = reg_save_area + 4*8. We do not copy shaodow for
// them as they will be found when checking call arguments.
if (!ArgTy->isFloatingPointTy()) {
uint64_t ArgSize = DL.getTypeAllocSize(ArgTy);
Align ArgAlign = Align(IntptrSize);
if (ArgTy->isArrayTy()) {
// Arrays are aligned to element size, except for long double
// arrays, which are aligned to 8 bytes.
Type *ElementTy = ArgTy->getArrayElementType();
if (!ElementTy->isPPC_FP128Ty())
ArgAlign = Align(DL.getTypeAllocSize(ElementTy));
} else if (ArgTy->isVectorTy()) {
// Vectors are naturally aligned.
ArgAlign = Align(ArgSize);
}
if (ArgAlign < IntptrSize)
ArgAlign = Align(IntptrSize);
VAArgOffset = alignTo(VAArgOffset, ArgAlign);
if (DL.isBigEndian()) {
// Adjusting the shadow for argument with size < IntptrSize to match
// the placement of bits in big endian system
if (ArgSize < IntptrSize)
VAArgOffset += (IntptrSize - ArgSize);
}
if (!IsFixed) {
Base = getShadowPtrForVAArgument(IRB, VAArgOffset - VAArgBase,
ArgSize);
if (Base)
IRB.CreateAlignedStore(MSV.getShadow(A), Base,
kShadowTLSAlignment);
}
VAArgOffset += ArgSize;
VAArgOffset = alignTo(VAArgOffset, Align(IntptrSize));
}
VAArgOffset += ArgSize;
VAArgOffset = alignTo(VAArgOffset, Align(8));
}
if (IsFixed)
VAArgBase = VAArgOffset;
}

Constant *TotalVAArgSize =
Expand Down Expand Up @@ -6675,24 +6656,68 @@ struct VarArgPowerPC32Helper : public VarArgHelperBase {
NextNodeIRBuilder IRB(OrigInst);
Value *VAListTag = OrigInst->getArgOperand(0);
Value *RegSaveAreaPtrPtr = IRB.CreatePtrToInt(VAListTag, MS.IntptrTy);
Value *RegSaveAreaSize = CopySize;

// In PPC32 va_list_tag is a struct, whereas in PPC64 it's a pointer
if (!TargetTriple.isPPC64()) {
RegSaveAreaPtrPtr =
IRB.CreateAdd(RegSaveAreaPtrPtr, ConstantInt::get(MS.IntptrTy, 8));
}
RegSaveAreaPtrPtr = IRB.CreateIntToPtr(RegSaveAreaPtrPtr, MS.PtrTy);
// In PPC32 va_list_tag is a struct
RegSaveAreaPtrPtr =
IRB.CreateAdd(RegSaveAreaPtrPtr, ConstantInt::get(MS.IntptrTy, 8));

// On PPC 32 reg_save_area can only hold 32 bytes of data
RegSaveAreaSize = IRB.CreateBinaryIntrinsic(
Intrinsic::umin, CopySize, ConstantInt::get(MS.IntptrTy, 32));

RegSaveAreaPtrPtr = IRB.CreateIntToPtr(RegSaveAreaPtrPtr, MS.PtrTy);
Value *RegSaveAreaPtr = IRB.CreateLoad(MS.PtrTy, RegSaveAreaPtrPtr);
Value *RegSaveAreaShadowPtr, *RegSaveAreaOriginPtr;

const DataLayout &DL = F.getDataLayout();
unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
const Align Alignment = Align(IntptrSize);
std::tie(RegSaveAreaShadowPtr, RegSaveAreaOriginPtr) =
MSV.getShadowOriginPtr(RegSaveAreaPtr, IRB, IRB.getInt8Ty(),
Alignment, /*isStore*/ true);
IRB.CreateMemCpy(RegSaveAreaShadowPtr, Alignment, VAArgTLSCopy, Alignment,
CopySize);

{ // Copy reg save area
Value *RegSaveAreaShadowPtr, *RegSaveAreaOriginPtr;
std::tie(RegSaveAreaShadowPtr, RegSaveAreaOriginPtr) =
MSV.getShadowOriginPtr(RegSaveAreaPtr, IRB, IRB.getInt8Ty(),
Alignment, /*isStore*/ true);
IRB.CreateMemCpy(RegSaveAreaShadowPtr, Alignment, VAArgTLSCopy,
Alignment, RegSaveAreaSize);

RegSaveAreaShadowPtr =
IRB.CreatePtrToInt(RegSaveAreaShadowPtr, MS.IntptrTy);
Value *FPSaveArea = IRB.CreateAdd(RegSaveAreaShadowPtr,
ConstantInt::get(MS.IntptrTy, 32));
FPSaveArea = IRB.CreateIntToPtr(FPSaveArea, MS.PtrTy);
// We fill fp shadow with zeroes as uninitialized fp args should have
// been found during call base check
IRB.CreateMemSet(FPSaveArea, ConstantInt::getNullValue(IRB.getInt8Ty()),
ConstantInt::get(MS.IntptrTy, 32), Alignment);
}

{ // Copy overflow area
// RegSaveAreaSize is min(CopySize, 32) -> no overflow can occur
Value *OverflowAreaSize = IRB.CreateSub(CopySize, RegSaveAreaSize);

Value *OverflowAreaPtrPtr = IRB.CreatePtrToInt(VAListTag, MS.IntptrTy);
OverflowAreaPtrPtr =
IRB.CreateAdd(OverflowAreaPtrPtr, ConstantInt::get(MS.IntptrTy, 4));
OverflowAreaPtrPtr = IRB.CreateIntToPtr(OverflowAreaPtrPtr, MS.PtrTy);

Value *OverflowAreaPtr = IRB.CreateLoad(MS.PtrTy, OverflowAreaPtrPtr);

Value *OverflowAreaShadowPtr, *OverflowAreaOriginPtr;
std::tie(OverflowAreaShadowPtr, OverflowAreaOriginPtr) =
MSV.getShadowOriginPtr(OverflowAreaPtr, IRB, IRB.getInt8Ty(),
Alignment, /*isStore*/ true);

Value *OverflowVAArgTLSCopyPtr =
IRB.CreatePtrToInt(VAArgTLSCopy, MS.IntptrTy);
OverflowVAArgTLSCopyPtr =
IRB.CreateAdd(OverflowVAArgTLSCopyPtr, RegSaveAreaSize);

OverflowVAArgTLSCopyPtr =
IRB.CreateIntToPtr(OverflowVAArgTLSCopyPtr, MS.PtrTy);
IRB.CreateMemCpy(OverflowAreaShadowPtr, Alignment,
OverflowVAArgTLSCopyPtr, Alignment, OverflowAreaSize);
}
}
}
};
Expand Down Expand Up @@ -7220,10 +7245,10 @@ static VarArgHelper *CreateVarArgHelper(Function &Func, MemorySanitizer &Msan,
// On PowerPC32 VAListTag is a struct
// {char, char, i16 padding, char *, char *}
if (TargetTriple.isPPC32())
return new VarArgPowerPC32Helper(Func, Msan, Visitor, /*VAListTagSize=*/12);
return new VarArgPowerPC32Helper(Func, Msan, Visitor);

if (TargetTriple.isPPC64())
return new VarArgPowerPC64Helper(Func, Msan, Visitor, /*VAListTagSize=*/8);
return new VarArgPowerPC64Helper(Func, Msan, Visitor);

if (TargetTriple.isRISCV32())
return new VarArgRISCVHelper(Func, Msan, Visitor, /*VAListTagSize=*/4);
Expand Down
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