-
Notifications
You must be signed in to change notification settings - Fork 13.6k
Reapply "[AMDGPU] Use the AMDGPUToolChain when targeting C/C++ directly" #125744
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
@llvm/pr-subscribers-clang-driver @llvm/pr-subscribers-clang Author: Joseph Huber (jhuber6) ChangesSummary: After discussions it was determined that the behavior for IR inputs Full diff: https://github.com/llvm/llvm-project/pull/125744.diff 3 Files Affected:
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index 912777a9808b4be..7420ebb0fe50ed6 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -146,6 +146,7 @@ getNVIDIAOffloadTargetTriple(const Driver &D, const ArgList &Args,
D.Diag(diag::err_drv_invalid_or_unsupported_offload_target) << TT->str();
return std::nullopt;
}
+
static std::optional<llvm::Triple>
getHIPOffloadTargetTriple(const Driver &D, const ArgList &Args) {
if (!Args.hasArg(options::OPT_offload_EQ)) {
@@ -168,6 +169,18 @@ getHIPOffloadTargetTriple(const Driver &D, const ArgList &Args) {
return std::nullopt;
}
+template <typename F>
+static bool usesInput(const ArgList &Args, F &&Fn) {
+ return llvm::any_of(Args, [&](Arg *A) {
+ return (A->getOption().matches(options::OPT_x) &&
+ Fn(types::lookupTypeForTypeSpecifier(A->getValue()))) ||
+ (A->getOption().getKind() == Option::InputClass &&
+ StringRef(A->getValue()).rfind('.') != StringRef::npos &&
+ Fn(types::lookupTypeForExtension(
+ &A->getValue()[StringRef(A->getValue()).rfind('.') + 1])));
+ });
+}
+
// static
std::string Driver::GetResourcesPath(StringRef BinaryPath) {
// Since the resource directory is embedded in the module hash, it's important
@@ -6672,9 +6685,14 @@ const ToolChain &Driver::getToolChain(const ArgList &Args,
case llvm::Triple::CUDA:
TC = std::make_unique<toolchains::NVPTXToolChain>(*this, Target, Args);
break;
- case llvm::Triple::AMDHSA:
- TC = std::make_unique<toolchains::ROCMToolChain>(*this, Target, Args);
+ case llvm::Triple::AMDHSA: {
+ bool DL =
+ usesInput(Args, types::isOpenCL) || usesInput(Args, types::isLLVMIR);
+ TC = DL ? std::make_unique<toolchains::ROCMToolChain>(*this, Target, Args)
+ : std::make_unique<toolchains::AMDGPUToolChain>(*this, Target,
+ Args);
break;
+ }
case llvm::Triple::AMDPAL:
case llvm::Triple::Mesa3D:
TC = std::make_unique<toolchains::AMDGPUToolChain>(*this, Target, Args);
diff --git a/clang/test/Driver/amdgpu-toolchain-opencl.cl b/clang/test/Driver/amdgpu-toolchain-opencl.cl
index 755d5e0ad8c502f..ffcaa1d7a232f10 100644
--- a/clang/test/Driver/amdgpu-toolchain-opencl.cl
+++ b/clang/test/Driver/amdgpu-toolchain-opencl.cl
@@ -35,3 +35,8 @@
// RUN: %clang -### --target=amdgcn-amd-amdhsa-opencl -x cl -c -emit-llvm -mcpu=fiji -nogpulib %s 2>&1 | FileCheck -check-prefix=CHECK-WARN-ATOMIC %s
// CHECK-WARN-ATOMIC: "-cc1"{{.*}} "-Werror=atomic-alignment"
+
+// RUN: %clang -### --target=amdgcn-amd-amdhsa -x cl -c -emit-llvm -mcpu=fiji %s 2>&1 \
+// RUN: -mcode-object-version=5 --rocm-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode \
+// RUN: | FileCheck -check-prefix=DEVICE-LIBS %s
+// DEVICE-LIBS: "-mlink-builtin-bitcode" "[[ROCM_PATH:.+]]/opencl.bc" "-mlink-builtin-bitcode" "[[ROCM_PATH]]/ocml.bc" "-mlink-builtin-bitcode" "[[ROCM_PATH]]/ockl.bc"
diff --git a/clang/test/Driver/amdgpu-toolchain.c b/clang/test/Driver/amdgpu-toolchain.c
index c1c5aa8e90e6868..cfe9ea1d4c7a99a 100644
--- a/clang/test/Driver/amdgpu-toolchain.c
+++ b/clang/test/Driver/amdgpu-toolchain.c
@@ -36,3 +36,11 @@
// RUN: %clang -target amdgcn-amd-amdhsa -march=gfx90a -stdlib -startfiles \
// RUN: -nogpulib -nogpuinc -### %s 2>&1 | FileCheck -check-prefix=STARTUP %s
// STARTUP: ld.lld{{.*}}"-lc" "-lm" "{{.*}}crt1.o"
+
+// RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx906 %s 2>&1 | FileCheck -check-prefix=ROCM %s
+// ROCM-NOT: -mlink-builtin-bitcode
+
+// RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=fiji -x ir %s \
+// RUN: --rocm-device-lib-path=%S/Inputs/rocm/amdgcn/bitcode 2>&1 \
+// RUN: | FileCheck -check-prefix=DEVICE-LIBS %s
+// DEVICE-LIBS: "-mlink-builtin-bitcode" "[[ROCM_PATH:.+]]/opencl.bc" "-mlink-builtin-bitcode" "[[ROCM_PATH]]/ocml.bc" "-mlink-builtin-bitcode" "[[ROCM_PATH]]/ockl.bc"
|
396691f
to
3d97ac5
Compare
✅ With the latest revision this PR passed the C/C++ code formatter. |
3d97ac5
to
3885784
Compare
…ly (llvm#99687)" Summary: This reverts commit 740e6ae. After discussions it was determined that the behavior for IR inputs needs to be maintained at least for now. In the future we should put a deprecation notice on this behavior. This patch keeps the old beahvior for OpenCL and IR inputs, while others will be standalone. This is good enough for standard compile flows.
3885784
to
ce7701b
Compare
Summary:
This reverts commit 740e6ae.
After discussions it was determined that the behavior for IR inputs
needs to be maintained at least for now. In the future we should put a
deprecation notice on this behavior. This patch keeps the old behavior
for OpenCL and IR inputs, while others will be standalone. This is good
enough for standard compile flows.