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[NVPTX] Add SM versions for 101 and 120 #124155

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Merged
merged 1 commit into from
Jan 24, 2025
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[NVPTX] Add SM versions for 101 and 120 #124155

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11 changes: 9 additions & 2 deletions llvm/lib/Target/NVPTX/NVPTX.td
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Original file line number Diff line number Diff line change
Expand Up @@ -35,15 +35,18 @@ class FeaturePTX<int version>:
"Use PTX version " # version>;

foreach sm = [20, 21, 30, 32, 35, 37, 50, 52, 53,
60, 61, 62, 70, 72, 75, 80, 86, 87, 89, 90, 100] in
60, 61, 62, 70, 72, 75, 80, 86, 87,
89, 90, 100, 101, 120] in
def SM#sm: FeatureSM<""#sm, !mul(sm, 10)>;

def SM90a: FeatureSM<"90a", 901>;
def SM100a: FeatureSM<"100a", 1001>;
def SM101a: FeatureSM<"101a", 1011>;
def SM120a: FeatureSM<"120a", 1201>;

foreach version = [32, 40, 41, 42, 43, 50, 60, 61, 62, 63, 64, 65,
70, 71, 72, 73, 74, 75, 76, 77, 78,
80, 81, 82, 83, 84, 85, 86] in
80, 81, 82, 83, 84, 85, 86, 87] in
def PTX#version: FeaturePTX<version>;

//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -76,6 +79,10 @@ def : Proc<"sm_90", [SM90, PTX78]>;
def : Proc<"sm_90a", [SM90a, PTX80]>;
def : Proc<"sm_100", [SM100, PTX86]>;
def : Proc<"sm_100a", [SM100a, PTX86]>;
def : Proc<"sm_101", [SM101, PTX86]>;
def : Proc<"sm_101a", [SM101a, PTX86]>;
def : Proc<"sm_120", [SM120, PTX87]>;
def : Proc<"sm_120a", [SM120a, PTX87]>;

def NVPTXInstrInfo : InstrInfo {
}
Expand Down
3 changes: 3 additions & 0 deletions llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
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Expand Up @@ -172,6 +172,9 @@ class hasSM<int version>: Predicate<"Subtarget->getSmVersion() >= " # version>;

// Explicit records for arch-accelerated SM versions
def hasSM90a : Predicate<"Subtarget->getFullSmVersion() == 901">;
def hasSM100a : Predicate<"Subtarget->getFullSmVersion() == 1001">;
def hasSM101a : Predicate<"Subtarget->getFullSmVersion() == 1011">;
def hasSM120a : Predicate<"Subtarget->getFullSmVersion() == 1201">;

// non-sync shfl instructions are not available on sm_70+ in PTX6.4+
def hasSHFL : Predicate<"!(Subtarget->getSmVersion() >= 70"
Expand Down
24 changes: 24 additions & 0 deletions llvm/test/CodeGen/NVPTX/sm-version.ll
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Expand Up @@ -16,6 +16,12 @@
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_86 | FileCheck %s --check-prefix=SM86
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_90 | FileCheck %s --check-prefix=SM90
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_90a | FileCheck %s --check-prefix=SM90a
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_100 | FileCheck %s --check-prefix=SM100
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_100a | FileCheck %s --check-prefix=SM100a
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_101 | FileCheck %s --check-prefix=SM101
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_101a | FileCheck %s --check-prefix=SM101a
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_120 | FileCheck %s --check-prefix=SM120
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_120a | FileCheck %s --check-prefix=SM120a

; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_21 | FileCheck %s --check-prefix=SM21
Expand All @@ -35,6 +41,12 @@
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_86 | FileCheck %s --check-prefix=SM86
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90 | FileCheck %s --check-prefix=SM90
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_90a | FileCheck %s --check-prefix=SM90a
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100 | FileCheck %s --check-prefix=SM100
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100a | FileCheck %s --check-prefix=SM100a
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_101 | FileCheck %s --check-prefix=SM101
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_101a | FileCheck %s --check-prefix=SM101a
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_120 | FileCheck %s --check-prefix=SM120
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_120a | FileCheck %s --check-prefix=SM120a

; SM20: .version 3.2
; SM21: .version 3.2
Expand All @@ -54,6 +66,12 @@
; SM86: .version 7.1
; SM90: .version 7.8
; SM90a: .version 8.0
; SM100: .version 8.6
; SM100a: .version 8.6
; SM101: .version 8.6
; SM101a: .version 8.6
; SM120: .version 8.7
; SM120a: .version 8.7

; SM20: .target sm_20
; SM21: .target sm_21
Expand All @@ -73,3 +91,9 @@
; SM86: .target sm_86
; SM90: .target sm_90
; SM90a: .target sm_90a
; SM100: .target sm_100
; SM100a: .target sm_100a
; SM101: .target sm_101
; SM101a: .target sm_101a
; SM120: .target sm_120
; SM120a: .target sm_120a
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