Skip to content

[MachinePipeliner] Remove UB from tests (NFC) #123169

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
Apr 21, 2025
Merged

[MachinePipeliner] Remove UB from tests (NFC) #123169

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
60dcc09
[MachinePipeliner] Fix fragile tests
kasuga-fj Jan 16, 2025
ec32c6c
Mitigate regressions
kasuga-fj Feb 20, 2025
dfa33bc
Undo some changes
kasuga-fj Apr 18, 2025
cc6b0f3
Remove UBs that seem unintentional
kasuga-fj Apr 18, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/Hexagon/swp-epilog-phi11.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
; CHECK: r{{[0-9]+}} = sfsub([[REG0]],[[REG1]])
; CHECK: r{{[0-9]+}} = sfsub([[REG0]],r{{[0-9]+}})

define dso_local void @test(i32 %m) local_unnamed_addr #0 {
define dso_local void @test(i32 %m, ptr noalias %p0, ptr noalias %p1) local_unnamed_addr #0 {
entry:
%div = sdiv i32 %m, 2
%sub = add nsw i32 %div, -1
Expand All @@ -20,9 +20,9 @@ for.body.prol:
%sr.prol = phi float [ %0, %for.body.prol ], [ undef, %entry ]
%sr109.prol = phi float [ %sr.prol, %for.body.prol ], [ undef, %entry ]
%prol.iter = phi i32 [ %prol.iter.sub, %for.body.prol ], [ undef, %entry ]
%0 = load float, ptr undef, align 4
%0 = load float, ptr %p0, align 4
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Using undef/null as a pointer operand for load/store causes UB.
https://llvm.org/docs/LangRef.html#undefined-values

%sub7.prol = fsub contract float %sr109.prol, %0
store float %sub7.prol, ptr null, align 4
store float %sub7.prol, ptr %p1, align 4
%prol.iter.sub = add i32 %prol.iter, -1
%prol.iter.cmp = icmp eq i32 %prol.iter.sub, 0
br i1 %prol.iter.cmp, label %for.body.prol.loopexit, label %for.body.prol
Expand Down
13 changes: 7 additions & 6 deletions llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,21 +10,22 @@
; CHECK: = add([[REG1]],#8)

; Function Attrs: nounwind
define ptr @f0(ptr nocapture readonly %a0, i32 %a1) #0 {
define ptr @f0(ptr nocapture readonly %a0, i32 %a1, ptr noalias %p0, ptr noalias %p1, ptr noalias %p2) #0 {
b0:
%v0 = alloca [129 x i32], align 8
br i1 undef, label %b1, label %b3
%cond = freeze i1 poison
br i1 %cond, label %b1, label %b3
Comment on lines -16 to +17
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Branching on an undef is UB.


b1: ; preds = %b0
br label %b2

b2: ; preds = %b2, %b1
%v1 = phi ptr [ %a0, %b1 ], [ %v2, %b2 ]
%v2 = phi ptr [ undef, %b1 ], [ %v15, %b2 ]
%v3 = phi ptr [ null, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ null, %b1 ], [ %v14, %b2 ]
%v2 = phi ptr [ %p0, %b1 ], [ %v15, %b2 ]
%v3 = phi ptr [ %p1, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ %p1, %b1 ], [ %v14, %b2 ]
%v5 = phi i32 [ 0, %b1 ], [ %v13, %b2 ]
%v6 = phi ptr [ undef, %b1 ], [ %v12, %b2 ]
%v6 = phi ptr [ %p2, %b1 ], [ %v12, %b2 ]
%v7 = load i16, ptr %v2, align 2
%v8 = sext i16 %v7 to i32
%v9 = call i32 @llvm.hexagon.M2.mpy.ll.s0(i32 %v8, i32 %v8) #2
Expand Down
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -10,18 +10,19 @@
; CHECK: endloop0

; Function Attrs: nounwind
define ptr @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr %b) #0 {
define ptr @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr %b, ptr %c) #0 {
b0:
br i1 undef, label %b1, label %b3
%cond = freeze i1 poison
br i1 %cond, label %b1, label %b3

b1: ; preds = %b0
br label %b2

b2: ; preds = %b2, %b1
%v1 = phi ptr [ %a0, %b1 ], [ %v2, %b2 ]
%v2 = phi ptr [ undef, %b1 ], [ %v15, %b2 ]
%v3 = phi ptr [ null, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ null, %b1 ], [ %v14, %b2 ]
%v3 = phi ptr [ %c, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ %c, %b1 ], [ %v14, %b2 ]
Comment on lines 23 to +25
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

%v2 does not appear to be used as a pointer operand of a load/store, so it has been left in place.

%v5 = phi i32 [ 0, %b1 ], [ %v13, %b2 ]
%v6 = phi ptr [ undef, %b1 ], [ %v12, %b2 ]
%a = mul i32 %v5, %a2
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
; CHECK: epilog:
; CHECK: %{{[0-9]+}}:intregs = PHI %{{.*}}, %[[REG]]

define void @f0(i32 %a0, i32 %a1) #0 {
define void @f0(i32 %a0, i32 %a1, ptr noalias %p0, ptr noalias %p1) #0 {
b0:
%v0 = icmp sgt i32 %a0, 64
br i1 %v0, label %b1, label %b3
Expand All @@ -23,7 +23,7 @@ b1: ; preds = %b0

b2: ; preds = %b2, %b1
%v1 = phi i32 [ %a0, %b1 ], [ %v13, %b2 ]
%v2 = phi ptr [ null, %b1 ], [ %v3, %b2 ]
%v2 = phi ptr [ %p0, %b1 ], [ %v3, %b2 ]
%v3 = getelementptr inbounds <16 x i32>, ptr %v2, i32 1
%v4 = load <16 x i32>, ptr %v2, align 64
%v5 = load <16 x i32>, ptr undef, align 64
Expand All @@ -34,7 +34,7 @@ b2: ; preds = %b2, %b1
%v10 = tail call <32 x i32> @llvm.hexagon.V6.vmpybus.acc(<32 x i32> %v9, <16 x i32> zeroinitializer, i32 undef)
%v11 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v10)
%v12 = tail call <16 x i32> @llvm.hexagon.V6.vasrhubsat(<16 x i32> undef, <16 x i32> %v11, i32 %a1)
store <16 x i32> %v12, ptr null, align 64
store <16 x i32> %v12, ptr %p1, align 64
%v13 = add nsw i32 %v1, -64
%v14 = icmp sgt i32 %v13, 64
br i1 %v14, label %b2, label %b3
Expand Down
13 changes: 7 additions & 6 deletions llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,21 +12,22 @@
; CHECK: [[REG0]] = add(r{{[0-9]+}},#8)

; Function Attrs: nounwind
define void @f0(ptr nocapture readonly %a0, i32 %a1) #0 {
define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, ptr noalias %a2, ptr %a3) #0 {
b0:
%v0 = alloca [129 x i32], align 8
br i1 undef, label %b1, label %b3
%cond = freeze i1 poison
br i1 %cond, label %b1, label %b3

b1: ; preds = %b0
br label %b2

b2: ; preds = %b2, %b1
%v1 = phi ptr [ %a0, %b1 ], [ %v2, %b2 ]
%v2 = phi ptr [ undef, %b1 ], [ %v15, %b2 ]
%v3 = phi ptr [ null, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ null, %b1 ], [ %v14, %b2 ]
%v2 = phi ptr [ %a0, %b1 ], [ %v15, %b2 ]
%v3 = phi ptr [ %a2, %b1 ], [ %v4, %b2 ]
%v4 = phi ptr [ %a2, %b1 ], [ %v14, %b2 ]
%v5 = phi i32 [ 0, %b1 ], [ %v13, %b2 ]
%v6 = phi ptr [ undef, %b1 ], [ %v12, %b2 ]
%v6 = phi ptr [ %a3, %b1 ], [ %v12, %b2 ]
%v7 = load i16, ptr %v2, align 2
%v8 = sext i16 %v7 to i32
%v9 = call i32 @llvm.hexagon.M2.mpy.ll.s0(i32 %v8, i32 %v8) #2
Expand Down
Loading