Skip to content

[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) #115528

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Dec 18, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
23 changes: 21 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -58706,11 +58706,30 @@ static SDValue combineEXTEND_VECTOR_INREG(SDNode *N, SelectionDAG &DAG,
static SDValue combineKSHIFT(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI) {
EVT VT = N->getValueType(0);

const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (ISD::isBuildVectorAllZeros(N->getOperand(0).getNode()))
return DAG.getConstant(0, SDLoc(N), VT);

const TargetLowering &TLI = DAG.getTargetLoweringInfo();
// Fold kshiftr(extract_subvector(X,C1),C2)
// --> extract_subvector(kshiftr(X,C1+C2),0)
// Fold kshiftr(kshiftr(X,C1),C2) --> kshiftr(X,C1+C2)
if (N->getOpcode() == X86ISD::KSHIFTR) {
SDLoc DL(N);
if (N->getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR ||
N->getOperand(0).getOpcode() == X86ISD::KSHIFTR) {
SDValue Src = N->getOperand(0).getOperand(0);
uint64_t Amt = N->getConstantOperandVal(1) +
N->getOperand(0).getConstantOperandVal(1);
EVT SrcVT = Src.getValueType();
if (TLI.isTypeLegal(SrcVT) && Amt < SrcVT.getVectorNumElements()) {
SDValue Shift = DAG.getNode(X86ISD::KSHIFTR, DL, SrcVT, Src,
DAG.getTargetConstant(Amt, DL, MVT::i8));
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Shift,
DAG.getIntPtrConstant(0, DL));
}
}
}

APInt DemandedElts = APInt::getAllOnes(VT.getVectorNumElements());
if (TLI.SimplifyDemandedVectorElts(SDValue(N, 0), DemandedElts, DCI))
return SDValue(N, 0);
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/avx512-bugfix-26264.ll
Original file line number Diff line number Diff line change
Expand Up @@ -7,11 +7,11 @@ define <32 x double> @test_load_32f64(ptr %ptrs, <32 x i1> %mask, <32 x double>
; AVX512BW-NEXT: vpsllw $7, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovb2m %zmm0, %k1
; AVX512BW-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
; AVX512BW-NEXT: kshiftrw $8, %k1, %k2
; AVX512BW-NEXT: kshiftrd $8, %k1, %k2
; AVX512BW-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k2}
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
; AVX512BW-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm2 {%k1}
; AVX512BW-NEXT: kshiftrw $8, %k1, %k1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
; AVX512BW-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm2 {%k2}
; AVX512BW-NEXT: kshiftrd $24, %k1, %k1
; AVX512BW-NEXT: vblendmpd 192(%rdi), %zmm4, %zmm3 {%k1}
; AVX512BW-NEXT: retq
%res = call <32 x double> @llvm.masked.load.v32f64.p0(ptr %ptrs, i32 4, <32 x i1> %mask, <32 x double> %src0)
Expand All @@ -24,11 +24,11 @@ define <32 x i64> @test_load_32i64(ptr %ptrs, <32 x i1> %mask, <32 x i64> %src0)
; AVX512BW-NEXT: vpsllw $7, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovb2m %zmm0, %k1
; AVX512BW-NEXT: vpblendmq (%rdi), %zmm1, %zmm0 {%k1}
; AVX512BW-NEXT: kshiftrw $8, %k1, %k2
; AVX512BW-NEXT: kshiftrd $8, %k1, %k2
; AVX512BW-NEXT: vpblendmq 64(%rdi), %zmm2, %zmm1 {%k2}
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
; AVX512BW-NEXT: vpblendmq 128(%rdi), %zmm3, %zmm2 {%k1}
; AVX512BW-NEXT: kshiftrw $8, %k1, %k1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
; AVX512BW-NEXT: vpblendmq 128(%rdi), %zmm3, %zmm2 {%k2}
; AVX512BW-NEXT: kshiftrd $24, %k1, %k1
; AVX512BW-NEXT: vpblendmq 192(%rdi), %zmm4, %zmm3 {%k1}
; AVX512BW-NEXT: retq
%res = call <32 x i64> @llvm.masked.load.v32i64.p0(ptr %ptrs, i32 4, <32 x i1> %mask, <32 x i64> %src0)
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll
Original file line number Diff line number Diff line change
Expand Up @@ -261,11 +261,11 @@ define <32 x double> @test_load_32f64(ptr %ptrs, <32 x i1> %mask, <32 x double>
; SKX-NEXT: vpsllw $7, %ymm0, %ymm0
; SKX-NEXT: vpmovb2m %ymm0, %k1
; SKX-NEXT: vblendmpd (%rdi), %zmm1, %zmm0 {%k1}
; SKX-NEXT: kshiftrw $8, %k1, %k2
; SKX-NEXT: kshiftrd $8, %k1, %k2
; SKX-NEXT: vblendmpd 64(%rdi), %zmm2, %zmm1 {%k2}
; SKX-NEXT: kshiftrd $16, %k1, %k1
; SKX-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm2 {%k1}
; SKX-NEXT: kshiftrw $8, %k1, %k1
; SKX-NEXT: kshiftrd $16, %k1, %k2
; SKX-NEXT: vblendmpd 128(%rdi), %zmm3, %zmm2 {%k2}
; SKX-NEXT: kshiftrd $24, %k1, %k1
; SKX-NEXT: vblendmpd 192(%rdi), %zmm4, %zmm3 {%k1}
; SKX-NEXT: retq
%res = call <32 x double> @llvm.masked.load.v32f64.p0(ptr %ptrs, i32 4, <32 x i1> %mask, <32 x double> %src0)
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/X86/pr33349.ll
Original file line number Diff line number Diff line change
Expand Up @@ -17,23 +17,23 @@ target triple = "x86_64-unknown-linux-gnu"
; KNL-NEXT: fldz
; KNL-NEXT: fld %st(0)
; KNL-NEXT: fcmovne %st(2), %st
; KNL-NEXT: testb $2, %al
; KNL-NEXT: fld %st(1)
; KNL-NEXT: fcmovne %st(3), %st
; KNL-NEXT: kmovw %k0, %eax
; KNL-NEXT: testb $1, %al
; KNL-NEXT: fld %st(1)
; KNL-NEXT: fcmovne %st(3), %st
; KNL-NEXT: testb $2, %al
; KNL-NEXT: fld %st(2)
; KNL-NEXT: fcmovne %st(4), %st
; KNL-NEXT: testb $2, %al
; KNL-NEXT: testb $8, %al
; KNL-NEXT: fxch %st(3)
; KNL-NEXT: fcmovne %st(4), %st
; KNL-NEXT: fstp %st(4)
; KNL-NEXT: fxch %st(3)
; KNL-NEXT: fstpt 30(%rdi)
; KNL-NEXT: fxch %st(1)
; KNL-NEXT: fstpt 10(%rdi)
; KNL-NEXT: fxch %st(1)
; KNL-NEXT: fstpt (%rdi)
; KNL-NEXT: fxch %st(1)
; KNL-NEXT: fstpt 30(%rdi)
; KNL-NEXT: fstpt 20(%rdi)
; KNL-NEXT: vzeroupper
; KNL-NEXT: retq
Expand All @@ -49,23 +49,23 @@ target triple = "x86_64-unknown-linux-gnu"
; SKX-NEXT: fldz
; SKX-NEXT: fld %st(0)
; SKX-NEXT: fcmovne %st(2), %st
; SKX-NEXT: testb $2, %al
; SKX-NEXT: fld %st(1)
; SKX-NEXT: fcmovne %st(3), %st
; SKX-NEXT: kmovd %k0, %eax
; SKX-NEXT: testb $1, %al
; SKX-NEXT: fld %st(1)
; SKX-NEXT: fcmovne %st(3), %st
; SKX-NEXT: testb $2, %al
; SKX-NEXT: fld %st(2)
; SKX-NEXT: fcmovne %st(4), %st
; SKX-NEXT: testb $2, %al
; SKX-NEXT: testb $8, %al
; SKX-NEXT: fxch %st(3)
; SKX-NEXT: fcmovne %st(4), %st
; SKX-NEXT: fstp %st(4)
; SKX-NEXT: fxch %st(3)
; SKX-NEXT: fstpt 30(%rdi)
; SKX-NEXT: fxch %st(1)
; SKX-NEXT: fstpt 10(%rdi)
; SKX-NEXT: fxch %st(1)
; SKX-NEXT: fstpt (%rdi)
; SKX-NEXT: fxch %st(1)
; SKX-NEXT: fstpt 30(%rdi)
; SKX-NEXT: fstpt 20(%rdi)
; SKX-NEXT: retq
bb:
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/X86/pr34177.ll
Original file line number Diff line number Diff line change
Expand Up @@ -51,18 +51,18 @@ define void @test(<4 x i64> %a, <4 x x86_fp80> %b, ptr %c) local_unnamed_addr {
; AVX512VL-NEXT: vpcmpeqq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %k0
; AVX512VL-NEXT: kshiftrb $2, %k0, %k1
; AVX512VL-NEXT: kmovd %k0, %eax
; AVX512VL-NEXT: testb $2, %al
; AVX512VL-NEXT: testb $8, %al
; AVX512VL-NEXT: fld1
; AVX512VL-NEXT: fldz
; AVX512VL-NEXT: fld %st(0)
; AVX512VL-NEXT: fcmovne %st(2), %st
; AVX512VL-NEXT: testb $1, %al
; AVX512VL-NEXT: testb $2, %al
; AVX512VL-NEXT: fld %st(1)
; AVX512VL-NEXT: fcmovne %st(3), %st
; AVX512VL-NEXT: kmovd %k1, %eax
; AVX512VL-NEXT: testb $2, %al
; AVX512VL-NEXT: testb $1, %al
; AVX512VL-NEXT: fld %st(2)
; AVX512VL-NEXT: fcmovne %st(4), %st
; AVX512VL-NEXT: kmovd %k1, %eax
; AVX512VL-NEXT: testb $1, %al
; AVX512VL-NEXT: fxch %st(3)
; AVX512VL-NEXT: fcmovne %st(4), %st
Expand All @@ -77,12 +77,12 @@ define void @test(<4 x i64> %a, <4 x x86_fp80> %b, ptr %c) local_unnamed_addr {
; AVX512VL-NEXT: fstpt 10(%rdi)
; AVX512VL-NEXT: fxch %st(1)
; AVX512VL-NEXT: fadd %st, %st(0)
; AVX512VL-NEXT: fstpt 60(%rdi)
; AVX512VL-NEXT: fadd %st, %st(0)
; AVX512VL-NEXT: fstpt 20(%rdi)
; AVX512VL-NEXT: fadd %st, %st(0)
; AVX512VL-NEXT: fstpt (%rdi)
; AVX512VL-NEXT: fadd %st, %st(0)
; AVX512VL-NEXT: fstpt 60(%rdi)
; AVX512VL-NEXT: fadd %st, %st(0)
; AVX512VL-NEXT: fstpt 40(%rdi)
%1 = icmp eq <4 x i64> <i64 0, i64 1, i64 2, i64 3>, %a
%2 = select <4 x i1> %1, <4 x x86_fp80> <x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000>, <4 x x86_fp80> zeroinitializer
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/vec_smulo.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2668,11 +2668,11 @@ define <64 x i32> @smulo_v64i8(<64 x i8> %a0, <64 x i8> %a1, ptr %p2) nounwind {
; AVX512BW-NEXT: vpmovm2b %k0, %zmm0
; AVX512BW-NEXT: vpcmpneqb %zmm1, %zmm0, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
; AVX512BW-NEXT: kshiftrq $16, %k1, %k2
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm1 {%k2} {z} = -1
; AVX512BW-NEXT: kshiftrq $32, %k1, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm2 {%k1} {z} = -1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
; AVX512BW-NEXT: kshiftrq $32, %k1, %k2
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm2 {%k2} {z} = -1
; AVX512BW-NEXT: kshiftrq $48, %k1, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm3 {%k1} {z} = -1
; AVX512BW-NEXT: vmovdqa64 %zmm4, (%rdi)
; AVX512BW-NEXT: retq
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/vec_umulo.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2329,11 +2329,11 @@ define <64 x i32> @umulo_v64i8(<64 x i8> %a0, <64 x i8> %a1, ptr %p2) nounwind {
; AVX512BW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vptestmb %zmm0, %zmm0, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k2
; AVX512BW-NEXT: kshiftrq $16, %k1, %k2
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm1 {%k2} {z} = -1
; AVX512BW-NEXT: kshiftrq $32, %k1, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm2 {%k1} {z} = -1
; AVX512BW-NEXT: kshiftrd $16, %k1, %k1
; AVX512BW-NEXT: kshiftrq $32, %k1, %k2
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm2 {%k2} {z} = -1
; AVX512BW-NEXT: kshiftrq $48, %k1, %k1
; AVX512BW-NEXT: vpternlogd {{.*#+}} zmm3 {%k1} {z} = -1
; AVX512BW-NEXT: vmovdqa64 %zmm4, (%rdi)
; AVX512BW-NEXT: retq
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/vector-compress.ll
Original file line number Diff line number Diff line change
Expand Up @@ -840,12 +840,12 @@ define <64 x i32> @test_compress_large(<64 x i1> %mask, <64 x i32> %vec, <64 x i
; AVX512VL-NEXT: subq $576, %rsp # imm = 0x240
; AVX512VL-NEXT: vpsllw $7, %zmm0, %zmm0
; AVX512VL-NEXT: vpmovb2m %zmm0, %k1
; AVX512VL-NEXT: kshiftrq $48, %k1, %k3
; AVX512VL-NEXT: kshiftrq $32, %k1, %k4
; AVX512VL-NEXT: kshiftrd $16, %k4, %k3
; AVX512VL-NEXT: kshiftrd $16, %k1, %k2
; AVX512VL-NEXT: kshiftrq $16, %k1, %k2
; AVX512VL-NEXT: vpcompressd %zmm1, %zmm0 {%k1} {z}
; AVX512VL-NEXT: vmovdqa64 %zmm0, (%rsp)
; AVX512VL-NEXT: kshiftrw $8, %k1, %k0
; AVX512VL-NEXT: kshiftrq $8, %k1, %k0
; AVX512VL-NEXT: kxorw %k0, %k1, %k0
; AVX512VL-NEXT: kshiftrw $4, %k0, %k5
; AVX512VL-NEXT: kxorw %k5, %k0, %k0
Expand All @@ -859,7 +859,7 @@ define <64 x i32> @test_compress_large(<64 x i1> %mask, <64 x i32> %vec, <64 x i
; AVX512VL-NEXT: vmovdqa64 %zmm0, (%rsp,%rax,4)
; AVX512VL-NEXT: vpcompressd %zmm3, %zmm0 {%k4} {z}
; AVX512VL-NEXT: vmovdqa64 %zmm0, {{[0-9]+}}(%rsp)
; AVX512VL-NEXT: kshiftrw $8, %k4, %k0
; AVX512VL-NEXT: kshiftrq $40, %k1, %k0
; AVX512VL-NEXT: kxorw %k0, %k4, %k0
; AVX512VL-NEXT: kshiftrw $4, %k0, %k4
; AVX512VL-NEXT: kxorw %k4, %k0, %k0
Expand Down
Loading
Loading